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Cobalt silicide and titanium silicide effects on nano devices

This paper describes growth process of the two silicide Sub-nanometer devices and the different effects of having cobalt silicide and titanium silicide on a Sub-nanometer CMOS devices. On the top of CMOS device gate, metal silicide is developed on-top of the polysilicon to produce an ohmic contact b...

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Main Authors: Elgomati, H.A., Majlis, B.Y., Salehuddin, F., Ahmad, I., Zaharim, A., Hamid, F.A.
Format: Conference Proceeding
Published: 2017
Online Access:http://dspace.uniten.edu.my:80/jspui/handle/123456789/5235
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spelling my.uniten.dspace-52352018-03-02T03:27:12Z Cobalt silicide and titanium silicide effects on nano devices Elgomati, H.A. Majlis, B.Y. Salehuddin, F. Ahmad, I. Zaharim, A. Hamid, F.A. This paper describes growth process of the two silicide Sub-nanometer devices and the different effects of having cobalt silicide and titanium silicide on a Sub-nanometer CMOS devices. On the top of CMOS device gate, metal silicide is developed on-top of the polysilicon to produce an ohmic contact between the polysilicon and aluminum wire. The ohmic contact should be better compared to metal-polysilicon borders. This silicide has been widely used to reduce resistance of polysilicon gates. Metal silicides such as titanium silicide (TiSi 2), tungsten salicide (WSi 2), cobalt salicide (CoSi 2) andnickel salicide (NiSi 2) are widely used for this purpose. These metals react with polysilicon, to form metal silicide layer that possesses better physical and electrical properties to interface with aluminium. The silicide need to be optimally annealed in order to obtain a good ratio of metal silicide to silicon in the gate structure Titanium silicide is formed by depositing PVD Ti on silicon substrates followed by annealing process. Anneals were carried out in an N2 ambient and resulted in a thin TiN layer on the silicide surface. For cobalt cilicide, a CVD cobalt layer was deposited on-top silicon at 450C, and after annealing the structure, Co 2Si phase was formed. And at 800C the high resistivity CoSi phase formed. As we continued to increase the anneal temperature to 950C, CoSi 2 layer is formed. The high temperature required to form a silicide and the non existence of the Co 2Si phase are attributed to the oxide at the interface. It is found that cobalt silicide grew faster and deeper to the silicon, thus saving a lot of time and cost. The succeding experiments also show that cobalt silicide has better electrical properties such as sheet resistance, capacitance and electron mobility. The transistor fabrication process was simulated by using Silvaco ATHENA module and the resulting electrical characterization was simulated using ATLAS module. © 2011 IEEE. 2017-11-15T02:56:54Z 2017-11-15T02:56:54Z 2011 Conference Proceeding http://dspace.uniten.edu.my:80/jspui/handle/123456789/5235 10.1109/RSM.2011.6088344
institution Universiti Tenaga Nasional
building UNITEN Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Tenaga Nasional
content_source UNITEN Institutional Repository
url_provider http://dspace.uniten.edu.my/
description This paper describes growth process of the two silicide Sub-nanometer devices and the different effects of having cobalt silicide and titanium silicide on a Sub-nanometer CMOS devices. On the top of CMOS device gate, metal silicide is developed on-top of the polysilicon to produce an ohmic contact between the polysilicon and aluminum wire. The ohmic contact should be better compared to metal-polysilicon borders. This silicide has been widely used to reduce resistance of polysilicon gates. Metal silicides such as titanium silicide (TiSi 2), tungsten salicide (WSi 2), cobalt salicide (CoSi 2) andnickel salicide (NiSi 2) are widely used for this purpose. These metals react with polysilicon, to form metal silicide layer that possesses better physical and electrical properties to interface with aluminium. The silicide need to be optimally annealed in order to obtain a good ratio of metal silicide to silicon in the gate structure Titanium silicide is formed by depositing PVD Ti on silicon substrates followed by annealing process. Anneals were carried out in an N2 ambient and resulted in a thin TiN layer on the silicide surface. For cobalt cilicide, a CVD cobalt layer was deposited on-top silicon at 450C, and after annealing the structure, Co 2Si phase was formed. And at 800C the high resistivity CoSi phase formed. As we continued to increase the anneal temperature to 950C, CoSi 2 layer is formed. The high temperature required to form a silicide and the non existence of the Co 2Si phase are attributed to the oxide at the interface. It is found that cobalt silicide grew faster and deeper to the silicon, thus saving a lot of time and cost. The succeding experiments also show that cobalt silicide has better electrical properties such as sheet resistance, capacitance and electron mobility. The transistor fabrication process was simulated by using Silvaco ATHENA module and the resulting electrical characterization was simulated using ATLAS module. © 2011 IEEE.
format Conference Proceeding
author Elgomati, H.A.
Majlis, B.Y.
Salehuddin, F.
Ahmad, I.
Zaharim, A.
Hamid, F.A.
spellingShingle Elgomati, H.A.
Majlis, B.Y.
Salehuddin, F.
Ahmad, I.
Zaharim, A.
Hamid, F.A.
Cobalt silicide and titanium silicide effects on nano devices
author_facet Elgomati, H.A.
Majlis, B.Y.
Salehuddin, F.
Ahmad, I.
Zaharim, A.
Hamid, F.A.
author_sort Elgomati, H.A.
title Cobalt silicide and titanium silicide effects on nano devices
title_short Cobalt silicide and titanium silicide effects on nano devices
title_full Cobalt silicide and titanium silicide effects on nano devices
title_fullStr Cobalt silicide and titanium silicide effects on nano devices
title_full_unstemmed Cobalt silicide and titanium silicide effects on nano devices
title_sort cobalt silicide and titanium silicide effects on nano devices
publishDate 2017
url http://dspace.uniten.edu.my:80/jspui/handle/123456789/5235
_version_ 1644493623712022528
score 13.211869

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