Analysis & design low power multiplier using TSMC 0.18µm CMOS technology
As the advance of VLSI technology, low power design has become an important topic in VLSI design. This project is to design a low power multiplier implemented in mentor graphic tools. Low power multipliers are developed through minimizing switching activities of partial product using the radix 4...
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| Format: | Learning Object |
| Language: | English |
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Universiti Malaysia Perlis
2008
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| Online Access: | http://dspace.unimap.edu.my/xmlui/handle/123456789/1974 |
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