Design and analysis of low power using Sleepy Stack and Zig-Zag technique
Now days the design of CMOS becomes greater where the number of transistor in design increased largely. However there are some problem that occurs during the excellent design and the increasing of transistor where the leakage power also increased. Furthermore, the leakage power that occurs makes t...
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| フォーマット: | Learning Object |
| 言語: | English |
| 出版事項: |
Universiti Malaysia Perlis
2008
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| オンライン･アクセス: | http://dspace.unimap.edu.my/xmlui/handle/123456789/1949 |
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