Study of Semi-Recessed LOCOS for Quasi-nanoscale CMOS Device Isolation
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Universiti Malaysia Perlis
2008
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my.unimap-13622008-10-29T06:33:31Z Study of Semi-Recessed LOCOS for Quasi-nanoscale CMOS Device Isolation Mohamad Idzham Abd Sani Zaliman Sauli, P.M. (Advisor) Metal oxide semiconductors, Complementary CMOS device isolation Semiconductor manufacturing Silicon Local oxidation of silicon (LOCOS) Semiconductor manufacturing Access is limited to UniMAP community. This project is entitled as semi-recessed LOCOS for CMOS device isolation. Local oxidation (LOCOS) technique is a widely used method for device isolation in semiconductor process integration. It is a simple, cheap yet and very effective to electrically isolating the highly packed devices down to 0.25um CMOS technology. Even though, the trench isolation is getting more popularity for 0.25um CMOS generation and below. The LOCOS isolation, due to its simplicity is still attractive for further scaling and improvement in semiconductor industry. The project is including several steps of process to produce the semi-recessed LOCOS. The main purpose of this project is to produces the small bird’s beak and varies on the pad oxide thickness whereby, the measurement is done using EDX (Energy dispersive X-ray spectroscopy) with the length setting 20 micron from boundary of an active area. From the results, it proved that the bird’s beak length is much depend on the pad oxide thickness whereby, the pad oxide should be at least 1/3 nitride thickness to work as a stress relief layer. 2008-07-02T06:35:23Z 2008-07-02T06:35:23Z 2007-03 Learning Object http://hdl.handle.net/123456789/1362 en Universiti Malaysia Perlis School of Microelectronic Engineering |
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Metal oxide semiconductors, Complementary CMOS device isolation Semiconductor manufacturing Silicon Local oxidation of silicon (LOCOS) Semiconductor manufacturing |
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Metal oxide semiconductors, Complementary CMOS device isolation Semiconductor manufacturing Silicon Local oxidation of silicon (LOCOS) Semiconductor manufacturing Mohamad Idzham Abd Sani Study of Semi-Recessed LOCOS for Quasi-nanoscale CMOS Device Isolation |
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Zaliman Sauli, P.M. (Advisor) |
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Zaliman Sauli, P.M. (Advisor) Mohamad Idzham Abd Sani |
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Learning Object |
author |
Mohamad Idzham Abd Sani |
author_sort |
Mohamad Idzham Abd Sani |
title |
Study of Semi-Recessed LOCOS for Quasi-nanoscale CMOS Device Isolation |
title_short |
Study of Semi-Recessed LOCOS for Quasi-nanoscale CMOS Device Isolation |
title_full |
Study of Semi-Recessed LOCOS for Quasi-nanoscale CMOS Device Isolation |
title_fullStr |
Study of Semi-Recessed LOCOS for Quasi-nanoscale CMOS Device Isolation |
title_full_unstemmed |
Study of Semi-Recessed LOCOS for Quasi-nanoscale CMOS Device Isolation |
title_sort |
study of semi-recessed locos for quasi-nanoscale cmos device isolation |
publisher |
Universiti Malaysia Perlis |
publishDate |
2008 |
url |
http://dspace.unimap.edu.my/xmlui/handle/123456789/1362 |
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1643787265927806976 |
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13.222552 |