Evaluation of machine learning classifiers in faulty die prediction to maximize cost scrapping avoidance and assembly test capacity savings in semiconductor integrated circuit (IC) manufacturing
Semiconductor manufacturing is a complex and expensive process. The semiconductor packaging trending towards for more complex package with higher performance and lower power consumption. The silicon die is manufactured using smaller fab process technology node and packaging technology is using more...
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主要な著者: | , , |
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フォーマット: | 論文 |
言語: | English |
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AIP Publishing LLC
2019
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オンライン・アクセス: | http://repo.uum.edu.my/27050/1/fazil2019.pdf http://repo.uum.edu.my/27050/ http://doi.org/10.1063/1.5121089 |
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