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A Case Study of Process Variation Effect to SoC Analog Circuits

Recent submicron process technology scaling leads the urgency to build an efficient methodology of characterizing and modeling the process variation effect, for example, the threshold voltage, Vt. This is one of the key process parameters that must be extensively modeled and validated for accurate c...

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Main Authors: Latif, Mohd Azman Abdul, Zain Ali, Noohul Basheer, Hussin, Fawnizu Azmadi
Format: Conference or Workshop Item
Published: 2011
Online Access:http://eprints.utp.edu.my/11996/1/06069366.pdf
http://eprints.utp.edu.my/11996/
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spelling my.utp.eprints.119962017-01-19T08:23:17Z A Case Study of Process Variation Effect to SoC Analog Circuits Latif, Mohd Azman Abdul Zain Ali, Noohul Basheer Hussin, Fawnizu Azmadi Recent submicron process technology scaling leads the urgency to build an efficient methodology of characterizing and modeling the process variation effect, for example, the threshold voltage, Vt. This is one of the key process parameters that must be extensively modeled and validated for accurate circuit performance. Furthermore, this requirement is even much more critical for analog applications which demand an ability to match devices precisely. Analog circuits use larger device dimensions as compared to digital circuits in order to minimize the process variation implication. This has led Negative Bias Temperature Instability (NBTI) to be the most performance limiter compared to the rest of reliability mechanisms. This reliability sensitivity is even more challenging as most of the circuit blocks (digital and analog) are fabricated on the same chip for system-on-chip (SoC) applications. This paper will describe in detail the actions taken to minimize impact to customers and will show how important proper aging simulations to be conducted with the right combination of process, voltage, temperature (PVT) and coupling/timing to occur due to process variation effect beyond specifications on analog differential amplifier (diffamp) circuits in SoC products. 2011 Conference or Workshop Item PeerReviewed application/pdf http://eprints.utp.edu.my/11996/1/06069366.pdf Latif, Mohd Azman Abdul and Zain Ali, Noohul Basheer and Hussin, Fawnizu Azmadi (2011) A Case Study of Process Variation Effect to SoC Analog Circuits. In: IEEE Recent Advances in Intelligent Computational Systems, Sep 22-24,2011, Trivandrum, India. http://eprints.utp.edu.my/11996/
institution Universiti Teknologi Petronas
building UTP Resource Centre
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Petronas
content_source UTP Institutional Repository
url_provider http://eprints.utp.edu.my/
description Recent submicron process technology scaling leads the urgency to build an efficient methodology of characterizing and modeling the process variation effect, for example, the threshold voltage, Vt. This is one of the key process parameters that must be extensively modeled and validated for accurate circuit performance. Furthermore, this requirement is even much more critical for analog applications which demand an ability to match devices precisely. Analog circuits use larger device dimensions as compared to digital circuits in order to minimize the process variation implication. This has led Negative Bias Temperature Instability (NBTI) to be the most performance limiter compared to the rest of reliability mechanisms. This reliability sensitivity is even more challenging as most of the circuit blocks (digital and analog) are fabricated on the same chip for system-on-chip (SoC) applications. This paper will describe in detail the actions taken to minimize impact to customers and will show how important proper aging simulations to be conducted with the right combination of process, voltage, temperature (PVT) and coupling/timing to occur due to process variation effect beyond specifications on analog differential amplifier (diffamp) circuits in SoC products.
format Conference or Workshop Item
author Latif, Mohd Azman Abdul
Zain Ali, Noohul Basheer
Hussin, Fawnizu Azmadi
spellingShingle Latif, Mohd Azman Abdul
Zain Ali, Noohul Basheer
Hussin, Fawnizu Azmadi
A Case Study of Process Variation Effect to SoC Analog Circuits
author_facet Latif, Mohd Azman Abdul
Zain Ali, Noohul Basheer
Hussin, Fawnizu Azmadi
author_sort Latif, Mohd Azman Abdul
title A Case Study of Process Variation Effect to SoC Analog Circuits
title_short A Case Study of Process Variation Effect to SoC Analog Circuits
title_full A Case Study of Process Variation Effect to SoC Analog Circuits
title_fullStr A Case Study of Process Variation Effect to SoC Analog Circuits
title_full_unstemmed A Case Study of Process Variation Effect to SoC Analog Circuits
title_sort case study of process variation effect to soc analog circuits
publishDate 2011
url http://eprints.utp.edu.my/11996/1/06069366.pdf
http://eprints.utp.edu.my/11996/
_version_ 1738655998900436992
score 13.211869

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