False path identification algorithm framework for nonseparable controller-data path circuits
In order to achieve the less test generation complexity, design-for-testability (DFT) techniques are used which causes untestable paths to be testable. These testable path delays have no effect on circuit performance are called false paths. It has been contended that such false paths should not be d...
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my.utp.eprints.119572017-01-19T08:20:56Z False path identification algorithm framework for nonseparable controller-data path circuits Shaheen, Ateeq U. R. Hussin, Fawnizu Azmadi Hamid, Nor Hisham In order to achieve the less test generation complexity, design-for-testability (DFT) techniques are used which causes untestable paths to be testable. These testable path delays have no effect on circuit performance are called false paths. It has been contended that such false paths should not be detected for test generation to keep off the unnecessary decrease in production. This paper proposes an algorithm frame-work to deal with these false paths through identification for DFT test. Proposed framework uses an integrated functional RTL circuit, called assignment decision diagram (ADD) which target at structural-level. Identification is done by sensitizing, observability and propagation rules for unified functional RTL circuits. Proposed framework overcomes the limitation of several existing RTL based approaches, such as the need for explicit separation between controller and data path. The effectiveness of the framework algorithm is shown through lemma proof. 2016 Conference or Workshop Item PeerReviewed application/pdf http://eprints.utp.edu.my/11957/1/1570256625_ICIAS2016.pdf Shaheen, Ateeq U. R. and Hussin, Fawnizu Azmadi and Hamid, Nor Hisham (2016) False path identification algorithm framework for nonseparable controller-data path circuits. In: 6th International Conference on Intelligent and Advanced Systems (ICIAS2016), August 15-17, 2016, Kuala Lumpur Malaysia. (In Press) http://eprints.utp.edu.my/11957/ |
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In order to achieve the less test generation complexity, design-for-testability (DFT) techniques are used which causes untestable paths to be testable. These testable path delays have no effect on circuit performance are called false paths. It has been contended that such false paths should not be detected for test generation to keep off the unnecessary decrease in production. This paper proposes an algorithm frame-work to deal with these false paths through identification for DFT test. Proposed framework uses an integrated functional RTL circuit, called assignment decision diagram (ADD) which target at structural-level. Identification is done by sensitizing, observability and propagation rules for unified functional RTL circuits. Proposed framework overcomes the limitation of several existing RTL based approaches, such as the need for explicit separation between controller and data path. The effectiveness of the framework algorithm is shown through lemma proof. |
| format |
Conference or Workshop Item |
| author |
Shaheen, Ateeq U. R. Hussin, Fawnizu Azmadi Hamid, Nor Hisham |
| spellingShingle |
Shaheen, Ateeq U. R. Hussin, Fawnizu Azmadi Hamid, Nor Hisham False path identification algorithm framework for nonseparable controller-data path circuits |
| author_facet |
Shaheen, Ateeq U. R. Hussin, Fawnizu Azmadi Hamid, Nor Hisham |
| author_sort |
Shaheen, Ateeq U. R. |
| title |
False path identification algorithm framework for nonseparable controller-data path circuits |
| title_short |
False path identification algorithm framework for nonseparable controller-data path circuits |
| title_full |
False path identification algorithm framework for nonseparable controller-data path circuits |
| title_fullStr |
False path identification algorithm framework for nonseparable controller-data path circuits |
| title_full_unstemmed |
False path identification algorithm framework for nonseparable controller-data path circuits |
| title_sort |
false path identification algorithm framework for nonseparable controller-data path circuits |
| publishDate |
2016 |
| url |
http://eprints.utp.edu.my/11957/1/1570256625_ICIAS2016.pdf http://eprints.utp.edu.my/11957/ |
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1738655993490833408 |
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13.251813 |