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Power-aware through-silicon-via minimization by partitioning finite state machine with datapath

This paper proposes an extended Finite State Machine with Datapath (FSMD) partitioning that performs three-dimensional (3D) high level synthesis (HLS) with objectives to minimize the number of through-silicon-via (TSV) and to equip the synthesized system with power gating capability to save power. T...

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书目详细资料
Main Authors:	Abdullah, A. C., Ooi, C. Y., Ismail, N. B., Mohammad, N. B.
格式:	Conference or Workshop Item
出版:	Institute of Electrical and Electronics Engineers Inc. 2016
主题:	T Technology (General)
在线阅读:	http://eprints.utm.my/id/eprint/73108/ https://www.scopus.com/inward/record.uri?eid=2-s2.0-84983419729&doi=10.1109%2fISCAS.2016.7538954&partnerID=40&md5=33ab547ae1e73ef425675a417f226e92
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