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Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET)

In this paper, we propose a fabrication process of Strained Silicon MOSFET incorporating Dielectric Pocket (SDP-MOSFET). By employing TCAD tools, a systematic process simulation in realizing the SDP-MOSFET structure is done successfully. By using vertical and horizontal doping profiles, 120 nm...

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Main Authors: Mohammed Napiah, Zul Atfyi Fauzan, Idris, Muhammad Idzdihar, Mohd Said, Muzalifah, Abdul Hamid, Afifah Maheran, Ali, Nur Alisa, Hamzah, Rostam Affendi
Format: Conference or Workshop Item
Language:English
Published: 2011
Subjects:
TK Electrical engineering. Electronics Nuclear engineering
Online Access:http://eprints.utem.edu.my/id/eprint/8535/1/012._1569455953.pdf
http://eprints.utem.edu.my/id/eprint/8535/
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spelling my.utem.eprints.85352015-05-28T03:57:19Z http://eprints.utem.edu.my/id/eprint/8535/ Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET) Mohammed Napiah, Zul Atfyi Fauzan Idris, Muhammad Idzdihar Mohd Said, Muzalifah Abdul Hamid, Afifah Maheran Ali, Nur Alisa Hamzah, Rostam Affendi TK Electrical engineering. Electronics Nuclear engineering In this paper, we propose a fabrication process of Strained Silicon MOSFET incorporating Dielectric Pocket (SDP-MOSFET). By employing TCAD tools, a systematic process simulation in realizing the SDP-MOSFET structure is done successfully. By using vertical and horizontal doping profiles, 120 nm gate length with 12 nm gate oxide of the device is observed respectively. The combination of a Silicon Germanium (SiGe) layer and incorporation of dielectric pocket (DP) shows an improved in suppression of short channel effects (SCE) and allows the threshold voltage and the performance of the devices to be optimized. A low leakage current (IOFF), good drive current (ION), higher mobility and lower power consumption are obtained in SDP-MOSFET. Consequently, the threshold voltage (VT) is decreased accordingly in SDP-MOSFET devices and shows a better control of VT roll-off. 2011 Conference or Workshop Item PeerReviewed application/pdf en http://eprints.utem.edu.my/id/eprint/8535/1/012._1569455953.pdf Mohammed Napiah, Zul Atfyi Fauzan and Idris, Muhammad Idzdihar and Mohd Said, Muzalifah and Abdul Hamid, Afifah Maheran and Ali, Nur Alisa and Hamzah, Rostam Affendi (2011) Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET). In: 2011 IEEE Regional Symposium on Micro and Nano Electronics (RSM 2011), September 28-30, 2011, Kota Kinabalu, Malaysia.
institution Universiti Teknikal Malaysia Melaka
building UTEM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknikal Malaysia Melaka
content_source UTEM Institutional Repository
url_provider http://eprints.utem.edu.my/
language English
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Mohammed Napiah, Zul Atfyi Fauzan
Idris, Muhammad Idzdihar
Mohd Said, Muzalifah
Abdul Hamid, Afifah Maheran
Ali, Nur Alisa
Hamzah, Rostam Affendi
Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET)
description In this paper, we propose a fabrication process of Strained Silicon MOSFET incorporating Dielectric Pocket (SDP-MOSFET). By employing TCAD tools, a systematic process simulation in realizing the SDP-MOSFET structure is done successfully. By using vertical and horizontal doping profiles, 120 nm gate length with 12 nm gate oxide of the device is observed respectively. The combination of a Silicon Germanium (SiGe) layer and incorporation of dielectric pocket (DP) shows an improved in suppression of short channel effects (SCE) and allows the threshold voltage and the performance of the devices to be optimized. A low leakage current (IOFF), good drive current (ION), higher mobility and lower power consumption are obtained in SDP-MOSFET. Consequently, the threshold voltage (VT) is decreased accordingly in SDP-MOSFET devices and shows a better control of VT roll-off.
format Conference or Workshop Item
author Mohammed Napiah, Zul Atfyi Fauzan
Idris, Muhammad Idzdihar
Mohd Said, Muzalifah
Abdul Hamid, Afifah Maheran
Ali, Nur Alisa
Hamzah, Rostam Affendi
author_facet Mohammed Napiah, Zul Atfyi Fauzan
Idris, Muhammad Idzdihar
Mohd Said, Muzalifah
Abdul Hamid, Afifah Maheran
Ali, Nur Alisa
Hamzah, Rostam Affendi
author_sort Mohammed Napiah, Zul Atfyi Fauzan
title Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET)
title_short Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET)
title_full Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET)
title_fullStr Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET)
title_full_unstemmed Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET)
title_sort process and characterization of strained silicon mosfet incorporating dielectric pocket (sdp-mosfet)
publishDate 2011
url http://eprints.utem.edu.my/id/eprint/8535/1/012._1569455953.pdf
http://eprints.utem.edu.my/id/eprint/8535/
_version_ 1665905363963084800
score 13.211869

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