An ultra low voltage energy efficient level shifter with current limiter and improved split-controlled inverter
This brief introduces an improved Wilson current mirror level shifter (WCMLS) circuit designed in CMOS 55 nm technology, optimized for ultra-low voltage applications. We aim to balance speed, power, and area by employing specific architectural choices in its pull-up and pull-down networks. The pull-...
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| Main Authors: | , , , , , , , |
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| Format: | Article |
| Published: |
Institute of Electrical and Electronics Engineers
2024
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| Online Access: | http://psasir.upm.edu.my/id/eprint/112098/ https://ieeexplore.ieee.org/document/10475672 |
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