Comments: LFSR based fast seed selection technique reducing test time of I DDQ testing

LFSR based fast seed selection technique reducing test time of I DDQ testing

This paper proposed IDDQ testing of combinational circuit using Linear Feedback Shift Register (LFSR) based fast seed selection technique. Although IDDQ testing is known to be effective to detect faults in CMOS circuit, test time of IDDQ testing is larger than that of logic testing. To reduce test t...

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Bibliographic Details
Main Authors:	Islam S.Z., Jidin R.B., Ali M.A.M.
Other Authors:	55432804400
Format:	Conference paper
Published:	2023
Subjects:	Bridging fault I<sub>DDQ</sub> LFSR Combinatorial circuits Industrial electronics Shift registers Benchmark circuit Bit flipping CMOS circuits Combinational circuits IDDQ testing Linear feedback shift registers Logic testing Seed selection Switching activities Test time Testing time Delay circuits
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LFSR based fast seed selection technique reducing test time of I DDQ testing

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