Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design
Design; FinFET; Leakage currents; Polysilicon; Surface properties; Threshold voltage; Central composite designs; International Technology Roadmap for Semiconductors; Optimization of process parameters; Optimization techniques; Process parameters; Response surface method; Response surface methodology...
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2023
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my.uniten.dspace-254222023-05-29T16:09:13Z Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design Roslan A.F. Salehuddin F. Zain A.S.M. Kaharudin K.E. Ahmad I. Hazura H. Hanim A.R. Idris S.K. Hamid A.M.A. 57203514087 36239165300 55925762500 56472706900 12792216600 35108985200 57193616206 57202632295 36570222300 Design; FinFET; Leakage currents; Polysilicon; Surface properties; Threshold voltage; Central composite designs; International Technology Roadmap for Semiconductors; Optimization of process parameters; Optimization techniques; Process parameters; Response surface method; Response surface methodology; Sub-threshold swing(ss); Semiconductor doping A 16 nm double-gate FinFET (DG-FinFET) designed are optimized with a mathematical modelling using a response surface method-central composite design (RSM-CCD), with the relationship between parameters and output responses are investigated and examined. The threshold voltage (VTH), drive current (ION), leakage current (IOFF) and subthreshold swing (SS) ramifications towards the adjustment of six process parameter that integrates polysilicon doping dose, polysilicon doping tilt, Source/Drain doping dose, Source/Drain doping tilt, VTH doping dose and VTH doping tilt is studied using the RSM-CCD using half-factorial of 86 experimental runs, which totals to 52 runs, consisting of 8 centre points, 12 axial points, and 32 factorials. Ultimately, the VTH after the result is optimized with RSM-CCD showcased an improvement at 0.1785 V, with IOFF achieved at 958.71 pA/?m despite performing less favourably after optimized. That said, an improvement towards ION/IOFF ratio at 2.049�106 compared to 1.666�106 proves that both optimization techniques have met the predictions of International Technology Roadmap for Semiconductors (ITRS) 2013. � 2020 IOP Publishing Ltd. All rights reserved. Final 2023-05-29T08:09:13Z 2023-05-29T08:09:13Z 2020 Conference Paper 10.1088/1742-6596/1502/1/012042 2-s2.0-85087105870 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85087105870&doi=10.1088%2f1742-6596%2f1502%2f1%2f012042&partnerID=40&md5=81bbfc0d3d8a32e9a0843af87664eaa1 https://irepository.uniten.edu.my/handle/123456789/25422 1502 1 12042 All Open Access, Gold Institute of Physics Publishing Scopus |
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| description |
Design; FinFET; Leakage currents; Polysilicon; Surface properties; Threshold voltage; Central composite designs; International Technology Roadmap for Semiconductors; Optimization of process parameters; Optimization techniques; Process parameters; Response surface method; Response surface methodology; Sub-threshold swing(ss); Semiconductor doping |
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57203514087 |
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57203514087 Roslan A.F. Salehuddin F. Zain A.S.M. Kaharudin K.E. Ahmad I. Hazura H. Hanim A.R. Idris S.K. Hamid A.M.A. |
| format |
Conference Paper |
| author |
Roslan A.F. Salehuddin F. Zain A.S.M. Kaharudin K.E. Ahmad I. Hazura H. Hanim A.R. Idris S.K. Hamid A.M.A. |
| spellingShingle |
Roslan A.F. Salehuddin F. Zain A.S.M. Kaharudin K.E. Ahmad I. Hazura H. Hanim A.R. Idris S.K. Hamid A.M.A. Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design |
| author_sort |
Roslan A.F. |
| title |
Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design |
| title_short |
Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design |
| title_full |
Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design |
| title_fullStr |
Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design |
| title_full_unstemmed |
Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design |
| title_sort |
optimization of process parameter variations for 16nm dg-finfet using response surface methodology-central composite design |
| publisher |
Institute of Physics Publishing |
| publishDate |
2023 |
| _version_ |
1806427985518002176 |
| score |
13.222552 |