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A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling

An analog circuit testing is considered to be most difficult and time consuming in modern mixed signal circuits design cycle. Rapid development in semiconductor technology increases the density of circuit in the chip. Testing these circuits for defects and faults using transistor level simulation...

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Main Authors: Farooq, Muhammad Umer, Xia, Likun, Azmadi, Fawnizu
Format: Conference or Workshop Item
Published: 2011
Subjects:
TS Manufactures
Online Access:http://eprints.utp.edu.my/7019/1/EE023.pdf
http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=19663
http://eprints.utp.edu.my/7019/
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spelling my.utp.eprints.70192017-01-19T08:22:24Z A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling Farooq, Muhammad Umer Xia, Likun Azmadi, Fawnizu TS Manufactures An analog circuit testing is considered to be most difficult and time consuming in modern mixed signal circuits design cycle. Rapid development in semiconductor technology increases the density of circuit in the chip. Testing these circuits for defects and faults using transistor level simulations is not only extremely time consuming but also very costly in terms of computational resources. Therefore, efficient alternative techniques are proposed which increase the fault simulation speed to save overall verification time. One such technique recently introduced is high level fault modeling and simulation. This technique makes use of mathematical models automatically generated for linear or nonlinear responses and replicate exact behavior of original circuits. These linear and nonlinear responses are then mapped to fault-free and faulty circuits respectively and then simulations are compared with original transistor level fault-free and faulty simulations. The objective of this paper is to provide a critical survey on automated model generation techniques and analyze them for higher level modeling and high level fault modeling. 2011-09-11 Conference or Workshop Item PeerReviewed application/pdf http://eprints.utp.edu.my/7019/1/EE023.pdf http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=19663 Farooq, Muhammad Umer and Xia, Likun and Azmadi, Fawnizu (2011) A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling. In: 2011 National Postgraduate Conference (NPC), 19-20 Sep 2011, UTP, Malaysia. http://eprints.utp.edu.my/7019/
institution Universiti Teknologi Petronas
building UTP Resource Centre
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Petronas
content_source UTP Institutional Repository
url_provider http://eprints.utp.edu.my/
topic TS Manufactures
spellingShingle TS Manufactures
Farooq, Muhammad Umer
Xia, Likun
Azmadi, Fawnizu
A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling
description An analog circuit testing is considered to be most difficult and time consuming in modern mixed signal circuits design cycle. Rapid development in semiconductor technology increases the density of circuit in the chip. Testing these circuits for defects and faults using transistor level simulations is not only extremely time consuming but also very costly in terms of computational resources. Therefore, efficient alternative techniques are proposed which increase the fault simulation speed to save overall verification time. One such technique recently introduced is high level fault modeling and simulation. This technique makes use of mathematical models automatically generated for linear or nonlinear responses and replicate exact behavior of original circuits. These linear and nonlinear responses are then mapped to fault-free and faulty circuits respectively and then simulations are compared with original transistor level fault-free and faulty simulations. The objective of this paper is to provide a critical survey on automated model generation techniques and analyze them for higher level modeling and high level fault modeling.
format Conference or Workshop Item
author Farooq, Muhammad Umer
Xia, Likun
Azmadi, Fawnizu
author_facet Farooq, Muhammad Umer
Xia, Likun
Azmadi, Fawnizu
author_sort Farooq, Muhammad Umer
title A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling
title_short A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling
title_full A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling
title_fullStr A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling
title_full_unstemmed A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling
title_sort critical survey on automated model generation techniques for high level modeling and high level fault modeling
publishDate 2011
url http://eprints.utp.edu.my/7019/1/EE023.pdf
http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=19663
http://eprints.utp.edu.my/7019/
_version_ 1738655538876514304
score 13.211869

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