A Critical Survey on Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling
An analog circuit testing is considered to be most difficult and time consuming in modern mixed signal circuits design cycle. Rapid development in semiconductor technology increases the density of circuit in the chip. Testing these circuits for defects and faults using transistor level simulation...
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Main Authors: | , , |
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Format: | Conference or Workshop Item |
Published: |
2011
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Subjects: | |
Online Access: | http://eprints.utp.edu.my/7019/1/EE023.pdf http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=19663 http://eprints.utp.edu.my/7019/ |
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