Improving router efficiency in network on chip triplet-based hierarchical interconnection network with shared buffer design
In Network on Chip effectiveness of router is dependent on the buffer locality, which makes the efficient flow control. Previous buffer design of Triplet-Based Hierarchical interconnection network (TBHIN) is standard, which leads to insufficient accessibility of this decisive resource, where each vi...
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| Main Authors: | , , , |
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| Format: | Conference or Workshop Item |
| Published: |
IEEE Computer Society
2015
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| Online Access: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-84959859257&doi=10.1109%2fISMS.2014.95&partnerID=40&md5=c1dee5a836ee80ef76a8004d07613a3e http://eprints.utp.edu.my/31582/ |
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