New asymmetrical modular multilevel inverter topology with reduced number of switches

In this article, a new single-phase multilevel inverter is introduced with a reduced number of power switches and reduced voltage stress on power switches. The proposed topology consists of four input dc sources and nine semiconductor switches (eight unidirectional and one bidirectional switch). The...

詳細記述

保存先:
書誌詳細
主要な著者: Kakar, Saifullah, Md. Ayob, Shahrin, Iqbal, Atif, Mohamad Nordin, Norjulia, Arif, M. Saad, Gore, Sheetal
フォーマット: 論文
言語:English
出版事項: Institute of Electrical and Electronics Engineers Inc. 2021
主題:
オンライン・アクセス:http://eprints.utm.my/id/eprint/94439/1/ShahrinMdAyob2021_NewAsymmetricalModularMultilevelInverterTopology.pdf
http://eprints.utm.my/id/eprint/94439/
http://dx.doi.org/10.1109/ACCESS.2021.3057554
タグ: タグ追加
タグなし, このレコードへの初めてのタグを付けませんか!
id my.utm.94439
record_format eprints
spelling my.utm.944392022-04-29T22:21:56Z http://eprints.utm.my/id/eprint/94439/ New asymmetrical modular multilevel inverter topology with reduced number of switches Kakar, Saifullah Md. Ayob, Shahrin Iqbal, Atif Mohamad Nordin, Norjulia Arif, M. Saad Gore, Sheetal TK Electrical engineering. Electronics Nuclear engineering In this article, a new single-phase multilevel inverter is introduced with a reduced number of power switches and reduced voltage stress on power switches. The proposed topology consists of four input dc sources and nine semiconductor switches (eight unidirectional and one bidirectional switch). The topology can be used for asymmetrical voltage source configuration to generate seventeen voltage levels. The extended topology is constructed by a series connection of the topology circuit to produce higher voltage levels with less voltage stress on the switches without modifying the existing structure. Comparison is made with traditional and recently introduced topologies based on the number of power switches, dc sources, total blocking voltage of switches, and gate driver circuits, to prove the proposed topology's superiority. A simple nearest level modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through simulation and hardware experimental setup. Institute of Electrical and Electronics Engineers Inc. 2021 Article PeerReviewed application/pdf en http://eprints.utm.my/id/eprint/94439/1/ShahrinMdAyob2021_NewAsymmetricalModularMultilevelInverterTopology.pdf Kakar, Saifullah and Md. Ayob, Shahrin and Iqbal, Atif and Mohamad Nordin, Norjulia and Arif, M. Saad and Gore, Sheetal (2021) New asymmetrical modular multilevel inverter topology with reduced number of switches. IEEE Access, 9 . pp. 27627-27637. ISSN 2169-3536 http://dx.doi.org/10.1109/ACCESS.2021.3057554
institution Universiti Teknologi Malaysia
building UTM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Malaysia
content_source UTM Institutional Repository
url_provider http://eprints.utm.my/
language English
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Kakar, Saifullah
Md. Ayob, Shahrin
Iqbal, Atif
Mohamad Nordin, Norjulia
Arif, M. Saad
Gore, Sheetal
New asymmetrical modular multilevel inverter topology with reduced number of switches
description In this article, a new single-phase multilevel inverter is introduced with a reduced number of power switches and reduced voltage stress on power switches. The proposed topology consists of four input dc sources and nine semiconductor switches (eight unidirectional and one bidirectional switch). The topology can be used for asymmetrical voltage source configuration to generate seventeen voltage levels. The extended topology is constructed by a series connection of the topology circuit to produce higher voltage levels with less voltage stress on the switches without modifying the existing structure. Comparison is made with traditional and recently introduced topologies based on the number of power switches, dc sources, total blocking voltage of switches, and gate driver circuits, to prove the proposed topology's superiority. A simple nearest level modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through simulation and hardware experimental setup.
format Article
author Kakar, Saifullah
Md. Ayob, Shahrin
Iqbal, Atif
Mohamad Nordin, Norjulia
Arif, M. Saad
Gore, Sheetal
author_facet Kakar, Saifullah
Md. Ayob, Shahrin
Iqbal, Atif
Mohamad Nordin, Norjulia
Arif, M. Saad
Gore, Sheetal
author_sort Kakar, Saifullah
title New asymmetrical modular multilevel inverter topology with reduced number of switches
title_short New asymmetrical modular multilevel inverter topology with reduced number of switches
title_full New asymmetrical modular multilevel inverter topology with reduced number of switches
title_fullStr New asymmetrical modular multilevel inverter topology with reduced number of switches
title_full_unstemmed New asymmetrical modular multilevel inverter topology with reduced number of switches
title_sort new asymmetrical modular multilevel inverter topology with reduced number of switches
publisher Institute of Electrical and Electronics Engineers Inc.
publishDate 2021
url http://eprints.utm.my/id/eprint/94439/1/ShahrinMdAyob2021_NewAsymmetricalModularMultilevelInverterTopology.pdf
http://eprints.utm.my/id/eprint/94439/
http://dx.doi.org/10.1109/ACCESS.2021.3057554
_version_ 1732945390809907200
score 13.251813