Network partitioning and GA heuristic crossover for NOC application mapping
Network-on-chip (NoC) has been introduced as a promising on-chip communication architecture to support many IP (intellectual property) cores on a single chip. Application mapping of IP cores onto a NoC topology is considered as a NP-hard problem. The increasing number of IP cores makes NoC applicati...
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| Main Authors: | , , , |
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| Format: | Conference or Workshop Item |
| Published: |
2013
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/51193/ http://dx.doi.org/10.1109/ISCAS.2013.6572074 |
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