Network partitioning and GA heuristic crossover for NOC application mapping
Network-on-chip (NoC) has been introduced as a promising on-chip communication architecture to support many IP (intellectual property) cores on a single chip. Application mapping of IP cores onto a NoC topology is considered as a NP-hard problem. The increasing number of IP cores makes NoC applicati...
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| Main Authors: | , , , |
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| Format: | Conference or Workshop Item |
| Published: |
2013
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/51193/ http://dx.doi.org/10.1109/ISCAS.2013.6572074 |
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| Summary: | Network-on-chip (NoC) has been introduced as a promising on-chip communication architecture to support many IP (intellectual property) cores on a single chip. Application mapping of IP cores onto a NoC topology is considered as a NP-hard problem. The increasing number of IP cores makes NoC application mapping more challenging to obtain optimum core-to-topology mapping. This paper proposes a genetic algorithm approach that incorporates network partitioning and heuristic crossover techniques to improve the NoC application mapping. Our experiment on VOPD (video object plane decoder) shows that our proposed method results in only 0.2% to 0.8% communication cost difference compared to global optimal mapping and 6% better communication cost compared to technique using conventional GA. |
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