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Testing and debugging mechanisms for network-on-chip

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Bibliographic Details
Main Author: Rajagopal , R. Selvakumar
Format: Thesis
Published: 2009
Subjects:
TK Electrical engineering. Electronics Nuclear engineering
Online Access:http://eprints.utm.my/id/eprint/18584/
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id my.utm.18584
record_format eprints
spelling my.utm.185842011-11-18T04:35:31Z http://eprints.utm.my/id/eprint/18584/ Testing and debugging mechanisms for network-on-chip Rajagopal , R. Selvakumar TK Electrical engineering. Electronics Nuclear engineering 2009 Thesis NonPeerReviewed Rajagopal , R. Selvakumar (2009) Testing and debugging mechanisms for network-on-chip. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering.
institution Universiti Teknologi Malaysia
building UTM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Malaysia
content_source UTM Institutional Repository
url_provider http://eprints.utm.my/
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Rajagopal , R. Selvakumar
Testing and debugging mechanisms for network-on-chip
format Thesis
author Rajagopal , R. Selvakumar
author_facet Rajagopal , R. Selvakumar
author_sort Rajagopal , R. Selvakumar
title Testing and debugging mechanisms for network-on-chip
title_short Testing and debugging mechanisms for network-on-chip
title_full Testing and debugging mechanisms for network-on-chip
title_fullStr Testing and debugging mechanisms for network-on-chip
title_full_unstemmed Testing and debugging mechanisms for network-on-chip
title_sort testing and debugging mechanisms for network-on-chip
publishDate 2009
url http://eprints.utm.my/id/eprint/18584/
_version_ 1643646942471782400
score 13.222552

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