Current-Voltage Analysis of Nanoscale Planar and Vertical MOSFET Incorporating Dielectric Pocket
Characterization of nanoscale planar and vertical metal-oxide-semiconductor field effect transistor incorporating dielectric pocket (DP-MOSFET) is demonstrated by using numerical simulation. Vertical MOSFET is one solution to shrink the channel length (Lg) into nanometer regime. The comparison betwe...
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Main Authors: | , |
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Format: | Article |
Language: | English |
Published: |
Penerbit Universiti, UTeM
2011
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Subjects: | |
Online Access: | http://eprints.utem.edu.my/id/eprint/8532/1/V3N2-05%2841-46%29.pdf http://eprints.utem.edu.my/id/eprint/8532/ |
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