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Accelerating Image Processing Of Wafer Inspection

Wafer inspection, where quality electronics integrated circuit is ensured to be manufactured, is playing an important role at the front line of E&E based manufacturing. The current line scan camera-based image processing software for wafer inspection, (edge detection, morphological operations, a...

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主要な著者: Md Salim, Sani Irwan, Lim, Kim Chuan, Mohd Yusof, Zulkalnain, Choo, Chin Yoon
フォーマット: Technical Report
言語:English
出版事項: UTeM 2020
オンライン･アクセス:http://eprints.utem.edu.my/id/eprint/25460/1/Accelerating%20Image%20Processing%20Of%20Wafer%20Inspection.pdf
http://eprints.utem.edu.my/id/eprint/25460/
https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=117974
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id my.utem.eprints.25460
record_format eprints
spelling my.utem.eprints.254602022-01-03T14:50:32Z http://eprints.utem.edu.my/id/eprint/25460/ Accelerating Image Processing Of Wafer Inspection Md Salim, Sani Irwan Lim, Kim Chuan Mohd Yusof, Zulkalnain Choo, Chin Yoon Wafer inspection, where quality electronics integrated circuit is ensured to be manufactured, is playing an important role at the front line of E&E based manufacturing. The current line scan camera-based image processing software for wafer inspection, (edge detection, morphological operations, and thresholding) is not able to run fast enough to meet the requirement for 8” wafer processing. In this project, an industry-grade PC is utilized with the available computing resources to parallelized and accelerate the required image processing pipeline for wafer inspection. The image processing recipes, which are provided by Synergy Integrated Resources Sdn Bhd, has successfully implemented through image processing acceleration technique. With the high signal to noise ratio image (produced by the precision micro stage) and quality line scan camera connected to the frame grabber, the captured wafer image has been increased up to 500 wafer chip inspection per second or 30,000 wafer chip per minutes. The identified wafer chip is processed in the constructed image processing pipeline defined with OpenVX and subsequently accelerated by Intel OpenVINO to fully utilize the Central Processing Unit (CPU) cores, Graphics Processing Unit (GPU), and Image Processing Unit (IPU), simultaneously. The performance of the image processing pipeline has also been increased significantly. This achievement offers a solution to the speed deficiency problems that bogged the current line scan camera-based image processing software for 8” wafer inspection. UTeM 2020 Technical Report NonPeerReviewed text en http://eprints.utem.edu.my/id/eprint/25460/1/Accelerating%20Image%20Processing%20Of%20Wafer%20Inspection.pdf Md Salim, Sani Irwan and Lim, Kim Chuan and Mohd Yusof, Zulkalnain and Choo, Chin Yoon (2020) Accelerating Image Processing Of Wafer Inspection. [Technical Report] (Submitted) https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=117974 CDR 21032
institution Universiti Teknikal Malaysia Melaka
building UTEM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknikal Malaysia Melaka
content_source UTEM Institutional Repository
url_provider http://eprints.utem.edu.my/
language English
description Wafer inspection, where quality electronics integrated circuit is ensured to be manufactured, is playing an important role at the front line of E&E based manufacturing. The current line scan camera-based image processing software for wafer inspection, (edge detection, morphological operations, and thresholding) is not able to run fast enough to meet the requirement for 8” wafer processing. In this project, an industry-grade PC is utilized with the available computing resources to parallelized and accelerate the required image processing pipeline for wafer inspection. The image processing recipes, which are provided by Synergy Integrated Resources Sdn Bhd, has successfully implemented through image processing acceleration technique. With the high signal to noise ratio image (produced by the precision micro stage) and quality line scan camera connected to the frame grabber, the captured wafer image has been increased up to 500 wafer chip inspection per second or 30,000 wafer chip per minutes. The identified wafer chip is processed in the constructed image processing pipeline defined with OpenVX and subsequently accelerated by Intel OpenVINO to fully utilize the Central Processing Unit (CPU) cores, Graphics Processing Unit (GPU), and Image Processing Unit (IPU), simultaneously. The performance of the image processing pipeline has also been increased significantly. This achievement offers a solution to the speed deficiency problems that bogged the current line scan camera-based image processing software for 8” wafer inspection.
format Technical Report
author Md Salim, Sani Irwan
Lim, Kim Chuan
Mohd Yusof, Zulkalnain
Choo, Chin Yoon
spellingShingle Md Salim, Sani Irwan
Lim, Kim Chuan
Mohd Yusof, Zulkalnain
Choo, Chin Yoon
Accelerating Image Processing Of Wafer Inspection
author_facet Md Salim, Sani Irwan
Lim, Kim Chuan
Mohd Yusof, Zulkalnain
Choo, Chin Yoon
author_sort Md Salim, Sani Irwan
title Accelerating Image Processing Of Wafer Inspection
title_short Accelerating Image Processing Of Wafer Inspection
title_full Accelerating Image Processing Of Wafer Inspection
title_fullStr Accelerating Image Processing Of Wafer Inspection
title_full_unstemmed Accelerating Image Processing Of Wafer Inspection
title_sort accelerating image processing of wafer inspection
publisher UTeM
publishDate 2020
url http://eprints.utem.edu.my/id/eprint/25460/1/Accelerating%20Image%20Processing%20Of%20Wafer%20Inspection.pdf
http://eprints.utem.edu.my/id/eprint/25460/
https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=117974
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score 13.251813

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