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Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology

This research article proposed a new modified single-phase multi-level inverter topology with an optimal switching control strategy to reduce the inverter output harmonic distortion. The topology is configured to operate in asymmetric mode to generate eleven levels of output voltage steps. Additiona...

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Main Authors: Shanono, Ibrahim Haruna, Nor Rul Hasma, Abdullah, Hamdan, Daniyal, Aisha, Muhammad
Format: Conference or Workshop Item
Language:English
English
Published: Institute of Electrical and Electronics Engineers Inc. 2022
Subjects:
T Technology (General)
TA Engineering (General). Civil engineering (General)
TK Electrical engineering. Electronics Nuclear engineering
Online Access:http://umpir.ump.edu.my/id/eprint/39411/1/Selective%20Harmonic%20Elimination%20using%20MFO%20for%20a%20Reduced%20Switch.pdf
http://umpir.ump.edu.my/id/eprint/39411/2/Selective%20harmonic%20elimination%20using%20MFO%20for%20a%20reduced%20switch%20multi-level%20inverter%20topology_ABS.pdf
http://umpir.ump.edu.my/id/eprint/39411/
https://doi.org/10.1109/ISIEA54517.2022.9873761
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spelling my.ump.umpir.394112023-11-28T04:53:39Z http://umpir.ump.edu.my/id/eprint/39411/ Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology Shanono, Ibrahim Haruna Nor Rul Hasma, Abdullah Hamdan, Daniyal Aisha, Muhammad T Technology (General) TA Engineering (General). Civil engineering (General) TK Electrical engineering. Electronics Nuclear engineering This research article proposed a new modified single-phase multi-level inverter topology with an optimal switching control strategy to reduce the inverter output harmonic distortion. The topology is configured to operate in asymmetric mode to generate eleven levels of output voltage steps. Additionally, a selective harmonic elimination technique has been deployed to minimize the switching loss and EMI. The Moth Flame Optimization (MFO) algorithm is deployed to compute the optimal switching angles. The proposed MLI topology is simulated in PSIM software using the optimized switching angles. The inverter performance parameters such as the total harmonic distortion (THD), harmonic amplitudes, switching, and conduction losses, were also analyzed and reported. The topology total harmonic distortion is 2.4%, hence satisfying the IEEE 519 standard. Institute of Electrical and Electronics Engineers Inc. 2022 Conference or Workshop Item PeerReviewed pdf en http://umpir.ump.edu.my/id/eprint/39411/1/Selective%20Harmonic%20Elimination%20using%20MFO%20for%20a%20Reduced%20Switch.pdf pdf en http://umpir.ump.edu.my/id/eprint/39411/2/Selective%20harmonic%20elimination%20using%20MFO%20for%20a%20reduced%20switch%20multi-level%20inverter%20topology_ABS.pdf Shanono, Ibrahim Haruna and Nor Rul Hasma, Abdullah and Hamdan, Daniyal and Aisha, Muhammad (2022) Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology. In: 2022 IEEE Symposium on Industrial Electronics and Applications, ISIEA 2022, 16-17 July 2020 , Langkawi Island. pp. 1-6. (182556). ISBN 978-166548012-3 https://doi.org/10.1109/ISIEA54517.2022.9873761
institution Universiti Malaysia Pahang Al-Sultan Abdullah
building UMPSA Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Pahang Al-Sultan Abdullah
content_source UMPSA Institutional Repository
url_provider http://umpir.ump.edu.my/
language English
English
topic T Technology (General)
TA Engineering (General). Civil engineering (General)
TK Electrical engineering. Electronics Nuclear engineering
spellingShingle T Technology (General)
TA Engineering (General). Civil engineering (General)
TK Electrical engineering. Electronics Nuclear engineering
Shanono, Ibrahim Haruna
Nor Rul Hasma, Abdullah
Hamdan, Daniyal
Aisha, Muhammad
Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology
description This research article proposed a new modified single-phase multi-level inverter topology with an optimal switching control strategy to reduce the inverter output harmonic distortion. The topology is configured to operate in asymmetric mode to generate eleven levels of output voltage steps. Additionally, a selective harmonic elimination technique has been deployed to minimize the switching loss and EMI. The Moth Flame Optimization (MFO) algorithm is deployed to compute the optimal switching angles. The proposed MLI topology is simulated in PSIM software using the optimized switching angles. The inverter performance parameters such as the total harmonic distortion (THD), harmonic amplitudes, switching, and conduction losses, were also analyzed and reported. The topology total harmonic distortion is 2.4%, hence satisfying the IEEE 519 standard.
format Conference or Workshop Item
author Shanono, Ibrahim Haruna
Nor Rul Hasma, Abdullah
Hamdan, Daniyal
Aisha, Muhammad
author_facet Shanono, Ibrahim Haruna
Nor Rul Hasma, Abdullah
Hamdan, Daniyal
Aisha, Muhammad
author_sort Shanono, Ibrahim Haruna
title Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology
title_short Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology
title_full Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology
title_fullStr Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology
title_full_unstemmed Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology
title_sort selective harmonic elimination using mfo for a reduced switch multi-level inverter topology
publisher Institute of Electrical and Electronics Engineers Inc.
publishDate 2022
url http://umpir.ump.edu.my/id/eprint/39411/1/Selective%20Harmonic%20Elimination%20using%20MFO%20for%20a%20Reduced%20Switch.pdf
http://umpir.ump.edu.my/id/eprint/39411/2/Selective%20harmonic%20elimination%20using%20MFO%20for%20a%20reduced%20switch%20multi-level%20inverter%20topology_ABS.pdf
http://umpir.ump.edu.my/id/eprint/39411/
https://doi.org/10.1109/ISIEA54517.2022.9873761
_version_ 1822923871841419264
score 13.232414

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