A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris
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2002
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my.um.stud.103402020-02-29T20:00:53Z A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris Muhd. Yamani, Idna Idris QA75 Electronic computers. Computer science T Technology (General) 2002-05 Thesis NonPeerReviewed application/pdf http://studentsrepo.um.edu.my/10340/1/Muhd._Yamani_Idna_Idris.pdf Muhd. Yamani, Idna Idris (2002) A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris. Undergraduates thesis, University of Malaya. http://studentsrepo.um.edu.my/10340/ |
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QA75 Electronic computers. Computer science T Technology (General) Muhd. Yamani, Idna Idris A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris |
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Muhd. Yamani, Idna Idris |
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Muhd. Yamani, Idna Idris |
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Muhd. Yamani, Idna Idris |
title |
A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris |
title_short |
A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris |
title_full |
A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris |
title_fullStr |
A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris |
title_full_unstemmed |
A VHDL implementation of bist technique in UART design / Muhd. Yamani Idna Idris |
title_sort |
vhdl implementation of bist technique in uart design / muhd. yamani idna idris |
publishDate |
2002 |
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http://studentsrepo.um.edu.my/10340/1/Muhd._Yamani_Idna_Idris.pdf http://studentsrepo.um.edu.my/10340/ |
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1738506354218237952 |
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13.211869 |