Analog and short channel effects performance of Sub-100 nm graded channel fully depleted silicon on insulator (SOI)
This paper presents the dependency of analog and Short Channel Effects (SCEs) performance of 75 nm channel length fully-depleted Silicon On Insulator (SOI) device on the applied Graded Channel (GC) design. The comparative analysis between standard SOI (STD SOI) devices at doped channel and equivalen...
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2014
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my.um.eprints.95442014-10-29T00:53:40Z http://eprints.um.edu.my/9544/ Analog and short channel effects performance of Sub-100 nm graded channel fully depleted silicon on insulator (SOI) Jafar, N. Soin, N. TA Engineering (General). Civil engineering (General) This paper presents the dependency of analog and Short Channel Effects (SCEs) performance of 75 nm channel length fully-depleted Silicon On Insulator (SOI) device on the applied Graded Channel (GC) design. The comparative analysis between standard SOI (STD SOI) devices at doped channel and equivalent threshold voltage, VTH with GC SOI device are examined on the basis of internal physical mechanisms. Device characterizations are performed using simulation based approached provided by ATLAS 2D. Results show superiority of GC performances over standard SOI devices in both analog and SCEs point of views. 2014 Conference or Workshop Item NonPeerReviewed application/pdf en http://eprints.um.edu.my/9544/1/analog_and_short_channel.pdf Jafar, N. and Soin, N. (2014) Analog and short channel effects performance of Sub-100 nm graded channel fully depleted silicon on insulator (SOI). In: WSEAS International Conference on Microelectronics, Nanoelectronics, Optoelectronics, May 30 - June 1 2009, Istanbul, Turkey. (Submitted) |
| institution |
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| building |
UM Library |
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Institutional Repository |
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| language |
English |
| topic |
TA Engineering (General). Civil engineering (General) |
| spellingShingle |
TA Engineering (General). Civil engineering (General) Jafar, N. Soin, N. Analog and short channel effects performance of Sub-100 nm graded channel fully depleted silicon on insulator (SOI) |
| description |
This paper presents the dependency of analog and Short Channel Effects (SCEs) performance of 75 nm channel length fully-depleted Silicon On Insulator (SOI) device on the applied Graded Channel (GC) design. The comparative analysis between standard SOI (STD SOI) devices at doped channel and equivalent threshold voltage, VTH with GC SOI device are examined on the basis of internal physical mechanisms. Device characterizations are performed using simulation based approached provided by ATLAS 2D. Results show superiority of GC performances over standard SOI devices in both analog and SCEs point of views. |
| format |
Conference or Workshop Item |
| author |
Jafar, N. Soin, N. |
| author_facet |
Jafar, N. Soin, N. |
| author_sort |
Jafar, N. |
| title |
Analog and short channel effects performance of Sub-100 nm graded channel fully depleted silicon on insulator (SOI)
|
| title_short |
Analog and short channel effects performance of Sub-100 nm graded channel fully depleted silicon on insulator (SOI)
|
| title_full |
Analog and short channel effects performance of Sub-100 nm graded channel fully depleted silicon on insulator (SOI)
|
| title_fullStr |
Analog and short channel effects performance of Sub-100 nm graded channel fully depleted silicon on insulator (SOI)
|
| title_full_unstemmed |
Analog and short channel effects performance of Sub-100 nm graded channel fully depleted silicon on insulator (SOI)
|
| title_sort |
analog and short channel effects performance of sub-100 nm graded channel fully depleted silicon on insulator (soi) |
| publishDate |
2014 |
| url |
http://eprints.um.edu.my/9544/1/analog_and_short_channel.pdf http://eprints.um.edu.my/9544/ |
| _version_ |
1643688593090150400 |
| score |
13.251813 |