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Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor

In this paper, a double-layered structure to form an N-Well meander-line structure by added shielding grounded conductor to improve the quality factor on-chip resistors in high frequency operation is presented. An additionally added shielding ground conductor is applied to the proposed structure to...

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Main Authors: Wong, Goon Weng, Soin, Norhayati
Format: Article
Published: Taylor & Francis 2024
Subjects:
TK Electrical engineering. Electronics Nuclear engineering
Online Access:http://eprints.um.edu.my/47176/
https://doi.org/10.1080/03772063.2023.2187464
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spelling my.um.eprints.471762024-12-30T04:59:49Z http://eprints.um.edu.my/47176/ Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor Wong, Goon Weng Soin, Norhayati TK Electrical engineering. Electronics Nuclear engineering In this paper, a double-layered structure to form an N-Well meander-line structure by added shielding grounded conductor to improve the quality factor on-chip resistors in high frequency operation is presented. An additionally added shielding ground conductor is applied to the proposed structure to reduce the induced capacitance coupling. and substrate losses for further improvement of the Q factor were also presented. Sonnet EM simulation result validated that double-layered structure via the shielding ground conductor was effective to improve their quality factors by 37.8% from 1.209 to -0.752 and reducing capacitance coupling effect by 57.92% from 55.23fF to 23.24fF during operating frequency at 10 GHz compared with conventional N-Well meander-line resistors. A novel structure in the design of a double-layered on-chip resistor with a shielding grounded conductor showed that capacitance coupling of parasitic effect was reduced; therefore, a low Q factor in high-frequency operations was obtained. Taylor & Francis 2024-03 Article PeerReviewed Wong, Goon Weng and Soin, Norhayati (2024) Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor. IETE Journal of Research, 70 (3). pp. 2859-2870. ISSN 0377-2063, DOI https://doi.org/10.1080/03772063.2023.2187464 <https://doi.org/10.1080/03772063.2023.2187464>. https://doi.org/10.1080/03772063.2023.2187464 10.1080/03772063.2023.2187464
institution Universiti Malaya
building UM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaya
content_source UM Research Repository
url_provider http://eprints.um.edu.my/
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Wong, Goon Weng
Soin, Norhayati
Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor
description In this paper, a double-layered structure to form an N-Well meander-line structure by added shielding grounded conductor to improve the quality factor on-chip resistors in high frequency operation is presented. An additionally added shielding ground conductor is applied to the proposed structure to reduce the induced capacitance coupling. and substrate losses for further improvement of the Q factor were also presented. Sonnet EM simulation result validated that double-layered structure via the shielding ground conductor was effective to improve their quality factors by 37.8% from 1.209 to -0.752 and reducing capacitance coupling effect by 57.92% from 55.23fF to 23.24fF during operating frequency at 10 GHz compared with conventional N-Well meander-line resistors. A novel structure in the design of a double-layered on-chip resistor with a shielding grounded conductor showed that capacitance coupling of parasitic effect was reduced; therefore, a low Q factor in high-frequency operations was obtained.
format Article
author Wong, Goon Weng
Soin, Norhayati
author_facet Wong, Goon Weng
Soin, Norhayati
author_sort Wong, Goon Weng
title Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor
title_short Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor
title_full Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor
title_fullStr Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor
title_full_unstemmed Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor
title_sort improved q-factor 3d double-layered on-chip resistor with shielded ground conductor
publisher Taylor & Francis
publishDate 2024
url http://eprints.um.edu.my/47176/
https://doi.org/10.1080/03772063.2023.2187464
_version_ 1819909895767457792
score 13.223943

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