Multi-sized output cache controllers / Mohd Naqib Johari
This thesis describes the design of a Multi-sized Output Cache Controller that will handle 2Kbyte 16 ways with 4 word block size cache. A cache controller is a device that used to sequences the read and write of the cache storage array [1]. Most of modern microprocessor is designed with multiple cor...
Saved in:
| Main Author: | |
|---|---|
| Format: | Thesis |
| Language: | English |
| Published: |
2013
|
| Subjects: | |
| Online Access: | https://ir.uitm.edu.my/id/eprint/102748/1/102748.pdf https://ir.uitm.edu.my/id/eprint/102748/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|