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Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin

This report presents the development of interfacing circuit for Triple Data Encryption Standard (3DES) that is being designed using Verilog HDL for Field Programmable Gate Array (FPGA) implementation. The purpose of this project is to design the interfacing circuit that can minimize the input/output...

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Bibliographic Details
Main Author: Kamal Bahrin, Nor Aizee Masyitah
Format: Thesis
Language:English
Published: 2006
Subjects:
Electric apparatus and materials. Electric circuits. Electric networks
Online Access:https://ir.uitm.edu.my/id/eprint/102744/1/102744.pdf
https://ir.uitm.edu.my/id/eprint/102744/
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spelling my.uitm.ir.1027442024-11-20T01:32:23Z https://ir.uitm.edu.my/id/eprint/102744/ Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin Kamal Bahrin, Nor Aizee Masyitah Electric apparatus and materials. Electric circuits. Electric networks This report presents the development of interfacing circuit for Triple Data Encryption Standard (3DES) that is being designed using Verilog HDL for Field Programmable Gate Array (FPGA) implementation. The purpose of this project is to design the interfacing circuit that can minimize the input/output port pins of the 3DES from about 300 pins to 44 pins that is suited for standard packaging available in the market. The port pins allow the 3DES to communicate with outside world. Xilinx ISE™ 7.1i software is utilized to create Verilog HDL code and synthesize. The result of simulation was carrying out by ModelSim XE III 6.0a. 2006 Thesis NonPeerReviewed text en https://ir.uitm.edu.my/id/eprint/102744/1/102744.pdf Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin. (2006) Degree thesis, thesis, Universiti Teknologi MARA (UiTM). <http://terminalib.uitm.edu.my/102744.pdf>
institution Universiti Teknologi Mara
building Tun Abdul Razak Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Mara
content_source UiTM Institutional Repository
url_provider http://ir.uitm.edu.my/
language English
topic Electric apparatus and materials. Electric circuits. Electric networks
spellingShingle Electric apparatus and materials. Electric circuits. Electric networks
Kamal Bahrin, Nor Aizee Masyitah
Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin
description This report presents the development of interfacing circuit for Triple Data Encryption Standard (3DES) that is being designed using Verilog HDL for Field Programmable Gate Array (FPGA) implementation. The purpose of this project is to design the interfacing circuit that can minimize the input/output port pins of the 3DES from about 300 pins to 44 pins that is suited for standard packaging available in the market. The port pins allow the 3DES to communicate with outside world. Xilinx ISE™ 7.1i software is utilized to create Verilog HDL code and synthesize. The result of simulation was carrying out by ModelSim XE III 6.0a.
format Thesis
author Kamal Bahrin, Nor Aizee Masyitah
author_facet Kamal Bahrin, Nor Aizee Masyitah
author_sort Kamal Bahrin, Nor Aizee Masyitah
title Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin
title_short Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin
title_full Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin
title_fullStr Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin
title_full_unstemmed Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin
title_sort development of interaction circuit for triple data encryption standard (3des) using verilog for fpga implementation / nor aizee masyitah kamal bahrin
publishDate 2006
url https://ir.uitm.edu.my/id/eprint/102744/1/102744.pdf
https://ir.uitm.edu.my/id/eprint/102744/
_version_ 1817847197091233792
score 13.222552

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