Cover Image

Efficient cache replacement policy for minimising error rate in L2-STT-MRAM caches

The current research statistics for cache designing reveals that Spin Torque Transfer Magnetic RAMs (STT-MRAMs) have become one of the most promising technologies in the field of memory chip design, gaining a lot of attention from researchers due to its dynamic direct map and data access policies...

Full description

Saved in:
Bibliographic Details
Main Authors: Olanrewaju, Rashidah Funke, Khan, Burhan Ul Islam, Khan, Abdul Raouf, Yaacob, Mashkuri, Alam, Md. Moktarul
Format: Article
Language:English
English
Published: Inderscience Publishers 2018
Subjects:
T10.5 Communication of technical information
Online Access:http://irep.iium.edu.my/70884/7/70884%20Efficient%20cache%20replacement%20policy%20for%20minimising%20error%20rate.pdf
http://irep.iium.edu.my/70884/8/70884%20Efficient%20cache%20replacement%20policy%20for%20minimising%20error%20rate%20SCOPUS.pdf
http://irep.iium.edu.my/70884/
https://www.inderscience.com/info/inarticle.php?artid=95434
Tags: Add Tag
No Tags, Be the first to tag this record!

Internet

http://irep.iium.edu.my/70884/7/70884%20Efficient%20cache%20replacement%20policy%20for%20minimising%20error%20rate.pdf
http://irep.iium.edu.my/70884/8/70884%20Efficient%20cache%20replacement%20policy%20for%20minimising%20error%20rate%20SCOPUS.pdf
http://irep.iium.edu.my/70884/
https://www.inderscience.com/info/inarticle.php?artid=95434

Similar Items