A new 13N-complexity memory built-in self-test algorithm to balance static random access memory static fault coverage and test time
As memories dominate the system-on-chip (SoC), their quality significantly impacts the chip manufacturing yield. There is a growing need to reduce the chip production time and cost, which mainly depends on the testing phase. Hence, a memory built-in self-test (MBIST) utilizing a low-complexity, high...
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| Main Authors: | , , , |
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| Format: | Article |
| Language: | en |
| Published: |
Institute Of Advanced Engineering And Science (IAES)
2025
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| Online Access: | http://eprints.utem.edu.my/id/eprint/28949/2/0230306052025169181780.pdf http://eprints.utem.edu.my/id/eprint/28949/ https://ijece.iaescore.com/index.php/IJECE/article/view/36168/17952 http://doi.org/10.11591/ijece.v15i1.pp163-173 |
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