Simulation of double stack dielectric MOS capacitor / Farhatasya Amran
This paper reports the study about the relationship of Capacitance-Voltage (C-V) characteristics in MOS structure devices characterization. All these things are completely related with the experimental of double stack dielectric MOS capacitor in range of 35nm, 65nm and 95nm Silicon Oxide thickness n...
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| Format: | Thesis |
| Language: | en |
| Published: |
2013
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| Online Access: | https://ir.uitm.edu.my/id/eprint/115148/1/115148.pdf https://ir.uitm.edu.my/id/eprint/115148/ |
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