Design of SAR ADC control logic using verilog HDL

This paper presents the design of successive approximation register analog to digital converter (SAR ADC) control logic using Verilog Hardware. Description Language (Verilog HDL) coding. This control logic design methodology is based on Xilinx ISE 8.1 i Field Programmable Gate Array (FPGA) design fl...

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Bibliographic Details

Main Author:	Ibrahim, Ahmad Arrazi
Format:	Student Project
Language:	en
Published:	2006
Subjects:	Applications of electronics Computer engineering. Computer hardware
Online Access:	https://ir.uitm.edu.my/id/eprint/114764/1/114764.pdf https://ir.uitm.edu.my/id/eprint/114764/
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