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2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications

In this work, a new structure of Schottky tunneling MOSFET has been designed and simulated. The proposed device structure uses floating gates and dual material main gates to counter short channel effects and to improve RF/Analog figures of merit for low power design applications. The use of floating...

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Main Authors: Rashid, S., Bashir, F., Khanday, F.A., Rafiq Beigh, M., Hussin, F.A.
Format: Article
Published: Institute of Electrical and Electronics Engineers Inc. 2021
Online Access:https://www.scopus.com/inward/record.uri?eid=2-s2.0-85107173607&doi=10.1109%2fACCESS.2021.3083929&partnerID=40&md5=98214f16a9e85119155db7540b324640
http://eprints.utp.edu.my/29532/
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spelling my.utp.eprints.295322022-03-25T02:08:35Z 2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications Rashid, S. Bashir, F. Khanday, F.A. Rafiq Beigh, M. Hussin, F.A. In this work, a new structure of Schottky tunneling MOSFET has been designed and simulated. The proposed device structure uses floating gates and dual material main gates to counter short channel effects and to improve RF/Analog figures of merit for low power design applications. The use of floating gates modulates the Schottky barrier width, hence improves the ON state and RF/Analog figures of merit performance of the proposed device in comparison to a conventional device. A significantly high ION(1.231 � 10-4A μm) and ION/IOFF ratio (2.52 � 105) is achieved in the proposed ST-MOSFET in comparison to conventional ST-MOSFET having ION (1 � 10-7A μm) and ION/IOFF ratio (1 � 102). It has been observed that there is more than 100 times improvement in cutoff frequency (fT), transconductance frequency product (TFP), gain frequency product (GFP), gain transconductance frequency product (GTFP), gain bandwidth product (GBP) and max oscillation frequency (fmax) in comparison to conventional ST-MOSFET. In addition, there are reductions of 98 and 33.33 in switching ON and OFF delays respectively in the proposed device-based inverter circuit in comparison to conventional ST-MOSFET based inverter circuit. Furthermore, the proposed ST-MOSFET device does not require any highly doped regions, hence does not have any doping related issues. © 2013 IEEE. Institute of Electrical and Electronics Engineers Inc. 2021 Article NonPeerReviewed https://www.scopus.com/inward/record.uri?eid=2-s2.0-85107173607&doi=10.1109%2fACCESS.2021.3083929&partnerID=40&md5=98214f16a9e85119155db7540b324640 Rashid, S. and Bashir, F. and Khanday, F.A. and Rafiq Beigh, M. and Hussin, F.A. (2021) 2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications. IEEE Access, 9 . pp. 80158-80169. http://eprints.utp.edu.my/29532/
institution Universiti Teknologi Petronas
building UTP Resource Centre
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Petronas
content_source UTP Institutional Repository
url_provider http://eprints.utp.edu.my/
description In this work, a new structure of Schottky tunneling MOSFET has been designed and simulated. The proposed device structure uses floating gates and dual material main gates to counter short channel effects and to improve RF/Analog figures of merit for low power design applications. The use of floating gates modulates the Schottky barrier width, hence improves the ON state and RF/Analog figures of merit performance of the proposed device in comparison to a conventional device. A significantly high ION(1.231 � 10-4A μm) and ION/IOFF ratio (2.52 � 105) is achieved in the proposed ST-MOSFET in comparison to conventional ST-MOSFET having ION (1 � 10-7A μm) and ION/IOFF ratio (1 � 102). It has been observed that there is more than 100 times improvement in cutoff frequency (fT), transconductance frequency product (TFP), gain frequency product (GFP), gain transconductance frequency product (GTFP), gain bandwidth product (GBP) and max oscillation frequency (fmax) in comparison to conventional ST-MOSFET. In addition, there are reductions of 98 and 33.33 in switching ON and OFF delays respectively in the proposed device-based inverter circuit in comparison to conventional ST-MOSFET based inverter circuit. Furthermore, the proposed ST-MOSFET device does not require any highly doped regions, hence does not have any doping related issues. © 2013 IEEE.
format Article
author Rashid, S.
Bashir, F.
Khanday, F.A.
Rafiq Beigh, M.
Hussin, F.A.
spellingShingle Rashid, S.
Bashir, F.
Khanday, F.A.
Rafiq Beigh, M.
Hussin, F.A.
2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications
author_facet Rashid, S.
Bashir, F.
Khanday, F.A.
Rafiq Beigh, M.
Hussin, F.A.
author_sort Rashid, S.
title 2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications
title_short 2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications
title_full 2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications
title_fullStr 2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications
title_full_unstemmed 2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications
title_sort 2-d design of double gate schottky tunnel mosfet for high-performance use in analog/rf applications
publisher Institute of Electrical and Electronics Engineers Inc.
publishDate 2021
url https://www.scopus.com/inward/record.uri?eid=2-s2.0-85107173607&doi=10.1109%2fACCESS.2021.3083929&partnerID=40&md5=98214f16a9e85119155db7540b324640
http://eprints.utp.edu.my/29532/
_version_ 1738656979138641920
score 13.211869

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