Small Area Implementation for Optically Reconfigurable Gate Array VLSI: FFT Case
Optically reconfigurable gate array (ORGA) is a type of multi-context field programmable gate array (FPGA) that has achieved a nanosecond-order reconfiguration capability as well as attaining numerous reconfiguration contexts. Its high-speed dynamic reconfiguration capability is suitable for dynamic...
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| Main Authors: | , , , , |
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| Format: | Article |
| Published: |
2017
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/81139/ http://nopr.niscair.res.in/handle/123456789/43037 |
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| Summary: | Optically reconfigurable gate array (ORGA) is a type of multi-context field programmable gate array (FPGA) that has achieved a nanosecond-order reconfiguration capability as well as attaining numerous reconfiguration contexts. Its high-speed dynamic reconfiguration capability is suitable for dynamically changing the function of multi-core processor. ORGA system has high dependability in a radiation rich environment and the development is progressing towards better radiation tolerance. In this paper, size minimization of the ORGA-VLSI is the main concern to maintain its high dependability; hence wire complexity needs special consideration during floor planning. A case of Fast Fourier Transform (FFT) is shown to demonstrate the effectiveness of circuit modification by implementing dynamic reconfiguration for area optimization. Results show that, compared with a normal FFT configuration, the minimum wirelength is reduced 5.5% for a 32-point FFT implementation. |
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