Integrated circuit design based on charge-modulated field effect transistor for deoxyribonucleic acid biosensing
The aim of this thesis is to design an on-chip Complementary Metal Oxide Semiconductor (CMOS) potentiometric biosensor circuit based on Charge-Modulated Field-Effect Transistor (CMFET) for label-free deoxyribonucleic acid (DNA) detection. Due to increasing demand for point-of-care testing to aid in...
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| Main Author: | |
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| Format: | Thesis |
| Language: | English |
| Published: |
2015
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/48765/25/WongHowHwanMFKE2015.pdf http://eprints.utm.my/id/eprint/48765/ http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:85740 |
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| Summary: | The aim of this thesis is to design an on-chip Complementary Metal Oxide Semiconductor (CMOS) potentiometric biosensor circuit based on Charge-Modulated Field-Effect Transistor (CMFET) for label-free deoxyribonucleic acid (DNA) detection. Due to increasing demand for point-of-care testing to aid in medical diagnostics, the research and development of inexpensive and small handheld biosensor device is growing rapidly every year. The potentiometric biosensors show great potential towards low cost and future miniaturization, but are thermally unstable due to the properties of the semiconductor structure and sensing films. Long-term stability in a solution and reduced signal-to-noise ratio can be obtained by using a cascode source-drain follower as the detection circuit. However, the cascode topology is not suitable for low supply voltage environment. Therefore, this work proposes a low voltage circuit design for an efficient and low power potentiometric DNA detection circuit. CMFET is used as a sensing device since it offers simplicity by eliminating the use of an external reference electrode and is compatible with the standard CMOS process. The detection circuit consists of a self-cascode source-drain follower and a two-stage differential amplifier. Self-cascode approach is used to improve the accuracy and input voltage range of the source-drain follower. The proposed detection circuit is designed and simulated using 0.18 µm Silterra CMOS fabrication process with 1.8 V supply. The input voltage range of the improved sourcedrain follower ranges from 0.104 V to 1.28 V within ± 5 mV of accuracy and the frequency range is 15.21 kHz. The power consumption of the improved source-drain follower is as low as 1.8 nW. The two-stage differential amplifier achieves a voltage gain of 76.19 dB and a frequency range of 2.45 kHz. The proposed potentiometric detection circuit gives a total gain of 79.81 dB with a frequency range of 1.528 kHz. The total power consumption is 0.19 mW and the optimized size of the layout area is 5405 µm2. |
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