A binary particle swarm optimization approach for buffer insertion in VLSI routing
Time delay in very large scale integration circuit routing can be improved using several techniques such as intelligent selection of the size of wire and buffer, and strategic buffer placement.This paper proposes the use of Binary Particle Swarm Optimization to find the best selection of the size of...
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| Main Authors: | , , , , , , |
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| Format: | Conference or Workshop Item |
| Published: |
2011
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/45463/ https://www.academia.edu/27138578/A_Binary_Particle_Swarm_Optimization_Approach_for_Buffer_Insertion_in_VLSI_Routing |
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