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SOI based nanowire single-electron transistors: design, simulation and process development

One of the great problems in current large-scale integrated circuits is increasing power dissipation in a small silicon chip. Single-electron transistor which operate by means of one-by-one electron transfer, is relatively small and consume very low power and suitable for achieving higher levels of...

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Main Authors: Hashim, Uda, Rasmi, Amiza, Sakrani, Samsudi
Format: Article
Language:English
Published: IJNeaM, Universiti Malaysia Perlis (UniMAP) 2007
Subjects:
QC Physics
Online Access:http://eprints.utm.my/id/eprint/2525/1/SamsudiSakrani2007_SOIBasedNanowireSingleElectron.pdf
http://eprints.utm.my/id/eprint/2525/
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spelling my.utm.25252014-01-15T07:08:09Z http://eprints.utm.my/id/eprint/2525/ SOI based nanowire single-electron transistors: design, simulation and process development Hashim, Uda Rasmi, Amiza Sakrani, Samsudi QC Physics One of the great problems in current large-scale integrated circuits is increasing power dissipation in a small silicon chip. Single-electron transistor which operate by means of one-by-one electron transfer, is relatively small and consume very low power and suitable for achieving higher levels of integration. In this research, the four masks step are involved namely source and drain mask, Polysilicon gate mask, contact mask, and metal mask. The masks were designed using ELPHY Quantum GDS II Editor with a nanowire length and nanowire width of approximately 0.10µm and 0.010 µm respectively. In addition, the process flow development of SET and the process and device simulation of SET are also explained in this paper. The Synopsys TCAD simulation tools are utilized for process and device simulation. The results from the device simulation showed that the final SET was operating at room temperature (300K) with a capacitance estimated around 0.4297 aF. IJNeaM, Universiti Malaysia Perlis (UniMAP) 2007 Article PeerReviewed application/pdf en http://eprints.utm.my/id/eprint/2525/1/SamsudiSakrani2007_SOIBasedNanowireSingleElectron.pdf Hashim, Uda and Rasmi, Amiza and Sakrani, Samsudi (2007) SOI based nanowire single-electron transistors: design, simulation and process development. International Journal of Materials Science and Semiconductors, 1 (1). pp. 33-47. ISSN 1985-5761(Print); 2232-1535(Electronic)
institution Universiti Teknologi Malaysia
building UTM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Malaysia
content_source UTM Institutional Repository
url_provider http://eprints.utm.my/
language English
topic QC Physics
spellingShingle QC Physics
Hashim, Uda
Rasmi, Amiza
Sakrani, Samsudi
SOI based nanowire single-electron transistors: design, simulation and process development
description One of the great problems in current large-scale integrated circuits is increasing power dissipation in a small silicon chip. Single-electron transistor which operate by means of one-by-one electron transfer, is relatively small and consume very low power and suitable for achieving higher levels of integration. In this research, the four masks step are involved namely source and drain mask, Polysilicon gate mask, contact mask, and metal mask. The masks were designed using ELPHY Quantum GDS II Editor with a nanowire length and nanowire width of approximately 0.10µm and 0.010 µm respectively. In addition, the process flow development of SET and the process and device simulation of SET are also explained in this paper. The Synopsys TCAD simulation tools are utilized for process and device simulation. The results from the device simulation showed that the final SET was operating at room temperature (300K) with a capacitance estimated around 0.4297 aF.
format Article
author Hashim, Uda
Rasmi, Amiza
Sakrani, Samsudi
author_facet Hashim, Uda
Rasmi, Amiza
Sakrani, Samsudi
author_sort Hashim, Uda
title SOI based nanowire single-electron transistors: design, simulation and process development
title_short SOI based nanowire single-electron transistors: design, simulation and process development
title_full SOI based nanowire single-electron transistors: design, simulation and process development
title_fullStr SOI based nanowire single-electron transistors: design, simulation and process development
title_full_unstemmed SOI based nanowire single-electron transistors: design, simulation and process development
title_sort soi based nanowire single-electron transistors: design, simulation and process development
publisher IJNeaM, Universiti Malaysia Perlis (UniMAP)
publishDate 2007
url http://eprints.utm.my/id/eprint/2525/1/SamsudiSakrani2007_SOIBasedNanowireSingleElectron.pdf
http://eprints.utm.my/id/eprint/2525/
_version_ 1643643600206036992
score 13.211869

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