An improved high gain single DC-Source MLI Circuit with reduced switch count and cost factor.
An improved high gain switched capacitors-based multilevel inverter (MLI) topology is developed for medium voltage and high-power applications. It consists of 13 unidirectional switches, a single dc source, and three capacitors for producing the 13-level output along with a sextuple voltage boost. T...
Saved in:
Main Authors: | , , , , , |
---|---|
Format: | Conference or Workshop Item |
Published: |
2023
|
Subjects: | |
Online Access: | http://eprints.utm.my/107812/ http://dx.doi.org/10.1109/PIECON56912.2023.10085845 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
id |
my.utm.107812 |
---|---|
record_format |
eprints |
spelling |
my.utm.1078122024-10-05T01:49:25Z http://eprints.utm.my/107812/ An improved high gain single DC-Source MLI Circuit with reduced switch count and cost factor. Mohammad,, Khan Alam, Mohd. Sarfaraz Mohd. Tahir, Mohd. Tahir Arif, M. Saad Rahat, Hamza Md. Ayob, Shahrin TK Electrical engineering. Electronics Nuclear engineering An improved high gain switched capacitors-based multilevel inverter (MLI) topology is developed for medium voltage and high-power applications. It consists of 13 unidirectional switches, a single dc source, and three capacitors for producing the 13-level output along with a sextuple voltage boost. The capacitors are self-balanced; hence, the circuit complexity is reduced, so there is no need for any auxiliary circuit or sensors. A simple and fundamental control strategy based on nearest-level pulse width modulation is applied to assess the viability of the proposed topology. Comparative analysis with other similar topologies verifies that the proposed circuit outperformed other topologies in terms of device count, cost function, power quality, and total standing voltage. The proposed topology viability is assessed under both static and dynamic loads. The losses across the components are calculated using thermal analysis in the PLECS. Results show that the topology works appropriately under different loading conditions. High boosted output and lower component count makes the proposed circuit suited for low voltage sources applications such as solar PV applications. 2023-04-14 Conference or Workshop Item PeerReviewed Mohammad,, Khan and Alam, Mohd. Sarfaraz and Mohd. Tahir, Mohd. Tahir and Arif, M. Saad and Rahat, Hamza and Md. Ayob, Shahrin (2023) An improved high gain single DC-Source MLI Circuit with reduced switch count and cost factor. In: 2023 International Conference on Power, Instrumentation, Energy and Control, PIECON 2023, 10 February 2023 - 12 February 2023, Aligarh, India. http://dx.doi.org/10.1109/PIECON56912.2023.10085845 |
institution |
Universiti Teknologi Malaysia |
building |
UTM Library |
collection |
Institutional Repository |
continent |
Asia |
country |
Malaysia |
content_provider |
Universiti Teknologi Malaysia |
content_source |
UTM Institutional Repository |
url_provider |
http://eprints.utm.my/ |
topic |
TK Electrical engineering. Electronics Nuclear engineering |
spellingShingle |
TK Electrical engineering. Electronics Nuclear engineering Mohammad,, Khan Alam, Mohd. Sarfaraz Mohd. Tahir, Mohd. Tahir Arif, M. Saad Rahat, Hamza Md. Ayob, Shahrin An improved high gain single DC-Source MLI Circuit with reduced switch count and cost factor. |
description |
An improved high gain switched capacitors-based multilevel inverter (MLI) topology is developed for medium voltage and high-power applications. It consists of 13 unidirectional switches, a single dc source, and three capacitors for producing the 13-level output along with a sextuple voltage boost. The capacitors are self-balanced; hence, the circuit complexity is reduced, so there is no need for any auxiliary circuit or sensors. A simple and fundamental control strategy based on nearest-level pulse width modulation is applied to assess the viability of the proposed topology. Comparative analysis with other similar topologies verifies that the proposed circuit outperformed other topologies in terms of device count, cost function, power quality, and total standing voltage. The proposed topology viability is assessed under both static and dynamic loads. The losses across the components are calculated using thermal analysis in the PLECS. Results show that the topology works appropriately under different loading conditions. High boosted output and lower component count makes the proposed circuit suited for low voltage sources applications such as solar PV applications. |
format |
Conference or Workshop Item |
author |
Mohammad,, Khan Alam, Mohd. Sarfaraz Mohd. Tahir, Mohd. Tahir Arif, M. Saad Rahat, Hamza Md. Ayob, Shahrin |
author_facet |
Mohammad,, Khan Alam, Mohd. Sarfaraz Mohd. Tahir, Mohd. Tahir Arif, M. Saad Rahat, Hamza Md. Ayob, Shahrin |
author_sort |
Mohammad,, Khan |
title |
An improved high gain single DC-Source MLI Circuit with reduced switch count and cost factor. |
title_short |
An improved high gain single DC-Source MLI Circuit with reduced switch count and cost factor. |
title_full |
An improved high gain single DC-Source MLI Circuit with reduced switch count and cost factor. |
title_fullStr |
An improved high gain single DC-Source MLI Circuit with reduced switch count and cost factor. |
title_full_unstemmed |
An improved high gain single DC-Source MLI Circuit with reduced switch count and cost factor. |
title_sort |
improved high gain single dc-source mli circuit with reduced switch count and cost factor. |
publishDate |
2023 |
url |
http://eprints.utm.my/107812/ http://dx.doi.org/10.1109/PIECON56912.2023.10085845 |
_version_ |
1814043530198253568 |
score |
13.211869 |