Redundant Residue Number System Code for Fault-Tolerant Hybrid Memories
Hybrid memories are envisioned as one of the alternatives to existing semiconductor memories. Although offering enormous data storage capacity, low power consumption, and reduced fabrication complexity (at least for the memory cell array), such memories are subject to a high degree of intermittent a...
Saved in:
Main Authors: | Haron, Nor Zaidi, Hamdioui, Said |
---|---|
Format: | Article |
Language: | English |
Published: |
Association for Computing Machinery (ACM)
2011
|
Subjects: | |
Online Access: | http://eprints.utem.edu.my/id/eprint/4525/1/NZBHaron_JETC2011.pdf http://eprints.utem.edu.my/id/eprint/4525/ |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Redundant Residue Number System Code for Fault-Tolerant
Hybrid Memories
by: Haron, Nor Zaidi
Published: (2011) -
Cost-Efficient Fault-Tolerant Decoder for
Hybrid Nanoelectronic Memories
by: Haron, Nor Zaidi, et al.
Published: (2011) -
Cost-Efficient Fault-Tolerant Decoder for Hybrid Nanoelectronic Memories
by: Haron, Nor Zaidi, et al.
Published: (2011) -
On Defect Oriented Testing for Hybrid CMOS/memristor Memory
by: Haron, Nor Zaidi, et al.
Published: (2011) -
On Defect Oriented Testing for Hybrid CMOS/memristor Memory
by: Haron, Nor Zaidi, et al.
Published: (2011)