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Formal Verification of Logic Control Systems with Nondeterministic Behaviors

This paper describes a formal modeling and verification of an arm pick-and-place system, in which nondeterministic behaviors of the arm state condition and timer function blocks are applied. We design an appropriate PLC program using a ladder diagram (LD) for the arm pick-and-place operation and app...

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书目详细资料
Main Authors:	Alwi, Saifulza, Yasutaka, Fujimoto
格式:	Article
语言:	English
出版:	The Institute of Electrical Engineers of Japan 2013
主题:	TK Electrical engineering. Electronics Nuclear engineering
在线阅读:	http://eprints.utem.edu.my/id/eprint/11248/1/_pdf http://eprints.utem.edu.my/id/eprint/11248/ https://www.jstage.jst.go.jp/article/ieejjia/2/6/2_306/_article
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