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Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation

Power consumption and speed are the main criteria in designing comparator for analog-to-digital converter (ADC). This paper presents an optimized low voltage low power dynamic comparator which is robust to process, voltage and temperature (PVT) variations with adequate speed. The comparator circui...

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Main Authors: Rusli, Julie Roslita, Shafie, Suhaidi, Mohd Sidek, Roslina, Abdul Majid, Hasmayadi, Wan Hasan, Wan Zuha, Mustafa, Mohd. Amrallah
Format: Article
Language:English
Published: Institute of Advanced Engineering and Science 2020
Online Access:http://psasir.upm.edu.my/id/eprint/87021/1/Optimized%20low%20voltage%20low%20power%20dynamic%20comparator.pdf
http://psasir.upm.edu.my/id/eprint/87021/
http://ijeecs.iaescore.com/index.php/IJEECS/article/view/20650
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spelling my.upm.eprints.870212022-01-10T08:55:15Z http://psasir.upm.edu.my/id/eprint/87021/ Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation Rusli, Julie Roslita Shafie, Suhaidi Mohd Sidek, Roslina Abdul Majid, Hasmayadi Wan Hasan, Wan Zuha Mustafa, Mohd. Amrallah Power consumption and speed are the main criteria in designing comparator for analog-to-digital converter (ADC). This paper presents an optimized low voltage low power dynamic comparator which is robust to process, voltage and temperature (PVT) variations with adequate speed. The comparator circuit was designed using 0.18µm CMOS technology with low voltage supply of 0.8V. The method used to verify the robustness of the comparator circuit across 45 PVT is presented. The circuit is simulated with 10% voltage supply variation, five process corners and temperature variation from 0°C to 100°C. The simulation result show that the proposed comparator circuit achieved significant reduction of power consumption and delay during worst case condition compared to dynamic comparator proposed from previous researchers. Institute of Advanced Engineering and Science 2020-02 Article PeerReviewed text en http://psasir.upm.edu.my/id/eprint/87021/1/Optimized%20low%20voltage%20low%20power%20dynamic%20comparator.pdf Rusli, Julie Roslita and Shafie, Suhaidi and Mohd Sidek, Roslina and Abdul Majid, Hasmayadi and Wan Hasan, Wan Zuha and Mustafa, Mohd. Amrallah (2020) Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation. Indonesian Journal of Electrical Engineering and Computer Science, 17 (2). 783 - 792. ISSN 2502-4752; ESSN: 2502-4760 http://ijeecs.iaescore.com/index.php/IJEECS/article/view/20650 10.11591/ijeecs.v17.i2.pp783-792
institution Universiti Putra Malaysia
building UPM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Putra Malaysia
content_source UPM Institutional Repository
url_provider http://psasir.upm.edu.my/
language English
description Power consumption and speed are the main criteria in designing comparator for analog-to-digital converter (ADC). This paper presents an optimized low voltage low power dynamic comparator which is robust to process, voltage and temperature (PVT) variations with adequate speed. The comparator circuit was designed using 0.18µm CMOS technology with low voltage supply of 0.8V. The method used to verify the robustness of the comparator circuit across 45 PVT is presented. The circuit is simulated with 10% voltage supply variation, five process corners and temperature variation from 0°C to 100°C. The simulation result show that the proposed comparator circuit achieved significant reduction of power consumption and delay during worst case condition compared to dynamic comparator proposed from previous researchers.
format Article
author Rusli, Julie Roslita
Shafie, Suhaidi
Mohd Sidek, Roslina
Abdul Majid, Hasmayadi
Wan Hasan, Wan Zuha
Mustafa, Mohd. Amrallah
spellingShingle Rusli, Julie Roslita
Shafie, Suhaidi
Mohd Sidek, Roslina
Abdul Majid, Hasmayadi
Wan Hasan, Wan Zuha
Mustafa, Mohd. Amrallah
Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation
author_facet Rusli, Julie Roslita
Shafie, Suhaidi
Mohd Sidek, Roslina
Abdul Majid, Hasmayadi
Wan Hasan, Wan Zuha
Mustafa, Mohd. Amrallah
author_sort Rusli, Julie Roslita
title Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation
title_short Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation
title_full Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation
title_fullStr Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation
title_full_unstemmed Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation
title_sort optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation
publisher Institute of Advanced Engineering and Science
publishDate 2020
url http://psasir.upm.edu.my/id/eprint/87021/1/Optimized%20low%20voltage%20low%20power%20dynamic%20comparator.pdf
http://psasir.upm.edu.my/id/eprint/87021/
http://ijeecs.iaescore.com/index.php/IJEECS/article/view/20650
_version_ 1724075488042811392
score 13.211869

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