Low power text compression using Huffman coding with power management controller
Data compression with low power dissipation is a useful technique in digital systems because it reduces data size with the smallest power consumed to overcome the design limitations. Huffman lossless compression is an important technique in information theory as well as in today‘s IT field. Reducing...
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| Format: | Thesis |
| Language: | English |
| Published: |
2016
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| Online Access: | http://psasir.upm.edu.my/id/eprint/70450/1/FK%202016%2076%20-%20IR.pdf http://psasir.upm.edu.my/id/eprint/70450/ |
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| Summary: | Data compression with low power dissipation is a useful technique in digital systems because it reduces data size with the smallest power consumed to overcome the design limitations. Huffman lossless compression is an important technique in information theory as well as in today‘s IT field. Reducing data size is the most important goal for Application-Specific Integrated Circuit (ASIC) design and power consumption is one of important issues which restrict the design performance. Therefore, reducing data size and embedding a Power Management Controller (PMC) in a synchronous system is a suitable technique for this problem. Using PMC to control the system to operate in fast and slow modes leads to low power dissipation. This work focused on the design of high performance Huffman compression with low power technique for all English text. Huffman tree is generated by sorting data according to their frequencies and traversing the tree to extract codeword bits for each character. Verilog HDL language used for writing Huffman codes and ModelSim tool was used for simulating the functionality of Huffman. In addition, Field-Programmable Gate Array (FPGA) was used to verify the functionality of Huffman. 8 green LEDs on the FPGA board were used as ASCII input for Huffman encoder, while the first 9 red LEDs on the board were utilized as output of the encoder. The process is reversed in the decoder implementation. A new sub module named PMC was created using clock gating and frequency scaling to improve power consumption in flexible design. Furthermore, Synopsys power compiler with 130nm technology library was used for power analysis. In this study, data size was reduced to 47.95% after compression process when compared with original data size. Moreover, with using PMC, power consumption was reduced up to 52.52% when compared with Huffman without using PMC. |
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