An FPGA implementation and performance analysis between radix-2 and radix-4 of 4096 point FFT
The rapid grown in wireless 4G and 5G technology push to the edge to high input data processing. High input data processing required advance Orthogonal Frequency Division Multiplexing (OFDM). The main block in any OFDM transceiver is the Fast Fourier Transform (FFT). FFT consider the transformation...
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| Main Authors: | , , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
IEEE
2018
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| Online Access: | http://psasir.upm.edu.my/id/eprint/68246/1/An%20FPGA%20implementation%20and%20performance%20analysis%20between%20radix-2%20and%20radix-4%20of%204096%20point%20FFT.pdf http://psasir.upm.edu.my/id/eprint/68246/ |
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| Summary: | The rapid grown in wireless 4G and 5G technology push to the edge to high input data processing. High input data processing required advance Orthogonal Frequency Division Multiplexing (OFDM). The main block in any OFDM transceiver is the Fast Fourier Transform (FFT). FFT consider the transformation bridge between the time and frequency domains. In this research an implementation and direct analysis between radix-2 and radix-4 FFT algorithms presented. Memory-based architecture adopted for the all algorithms. The entire algorithm designed by Altera Quartus II and synthesis for Altera DE2-70 field programmable gate arrays (FPGA) board, in order to investigate and determine the desired algorithm based on the application used for and the system requirement. |
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