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Neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation

Three-level inverters have emerged as the main alternative to replace the use of standard two-level inverters in current harmonics mitigation. Neutral-point diode clamped (NPC) inverter is the most attractive candidate due to its robustness. However, the inherent neutral-point voltage deviation prob...

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Main Authors: Yap, Hoon, Mohd Radzi, Mohd Amran, Hassan, Mohd Khair, Mailah, Nashiren Farzilah
Format: Article
Language:English
Published: Institution of Engineering and Technology 2017
Online Access:http://psasir.upm.edu.my/id/eprint/62524/1/NEURAL.pdf
http://psasir.upm.edu.my/id/eprint/62524/
https://ieeexplore.ieee.org/document/7887440/authors#authors
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spelling my.upm.eprints.625242020-12-03T20:43:56Z http://psasir.upm.edu.my/id/eprint/62524/ Neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation Yap, Hoon Mohd Radzi, Mohd Amran Hassan, Mohd Khair Mailah, Nashiren Farzilah Three-level inverters have emerged as the main alternative to replace the use of standard two-level inverters in current harmonics mitigation. Neutral-point diode clamped (NPC) inverter is the most attractive candidate due to its robustness. However, the inherent neutral-point voltage deviation problems have always been the most troublesome features of NPC inverter. Hence, voltage balancing of DC-link capacitors is highly essential, where it is usually achieved through proper switching control. Space vector pulsewidth modulation is the most desirable switching scheme, where the voltage balancing control is mostly accomplished by decently allocating the dwell time for all the switching states. In this study, a fuzzy logic controller is incorporated to systematically control the dwell time allocation for all the switching states based on the instantaneous voltage of splitting DC-link capacitors. The proposed method is called the fuzzy-based dwell time allocation algorithm. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB-Simulink and experimental implementation utilising TMS320F28335 digital signal processor (DSP) are performed. Both simulation and experimental results are presented, confirming effectiveness of the proposed algorithm in reducing the inherent voltage deviation problems of NPC inverter to a minimum level. Institution of Engineering and Technology 2017 Article PeerReviewed text en http://psasir.upm.edu.my/id/eprint/62524/1/NEURAL.pdf Yap, Hoon and Mohd Radzi, Mohd Amran and Hassan, Mohd Khair and Mailah, Nashiren Farzilah (2017) Neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation. IET Power Electronics, 10 (4). pp. 429-441. ISSN 1755-4535 https://ieeexplore.ieee.org/document/7887440/authors#authors 10.1049/iet-pel.2016.0240
institution Universiti Putra Malaysia
building UPM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Putra Malaysia
content_source UPM Institutional Repository
url_provider http://psasir.upm.edu.my/
language English
description Three-level inverters have emerged as the main alternative to replace the use of standard two-level inverters in current harmonics mitigation. Neutral-point diode clamped (NPC) inverter is the most attractive candidate due to its robustness. However, the inherent neutral-point voltage deviation problems have always been the most troublesome features of NPC inverter. Hence, voltage balancing of DC-link capacitors is highly essential, where it is usually achieved through proper switching control. Space vector pulsewidth modulation is the most desirable switching scheme, where the voltage balancing control is mostly accomplished by decently allocating the dwell time for all the switching states. In this study, a fuzzy logic controller is incorporated to systematically control the dwell time allocation for all the switching states based on the instantaneous voltage of splitting DC-link capacitors. The proposed method is called the fuzzy-based dwell time allocation algorithm. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB-Simulink and experimental implementation utilising TMS320F28335 digital signal processor (DSP) are performed. Both simulation and experimental results are presented, confirming effectiveness of the proposed algorithm in reducing the inherent voltage deviation problems of NPC inverter to a minimum level.
format Article
author Yap, Hoon
Mohd Radzi, Mohd Amran
Hassan, Mohd Khair
Mailah, Nashiren Farzilah
spellingShingle Yap, Hoon
Mohd Radzi, Mohd Amran
Hassan, Mohd Khair
Mailah, Nashiren Farzilah
Neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation
author_facet Yap, Hoon
Mohd Radzi, Mohd Amran
Hassan, Mohd Khair
Mailah, Nashiren Farzilah
author_sort Yap, Hoon
title Neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation
title_short Neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation
title_full Neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation
title_fullStr Neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation
title_full_unstemmed Neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation
title_sort neutral-point voltage deviation control for three-level inverter-based shunt active power filter with fuzzy-based dwell time allocation
publisher Institution of Engineering and Technology
publishDate 2017
url http://psasir.upm.edu.my/id/eprint/62524/1/NEURAL.pdf
http://psasir.upm.edu.my/id/eprint/62524/
https://ieeexplore.ieee.org/document/7887440/authors#authors
_version_ 1687395143899938816
score 13.211869

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