CMOS Variable Gain Low Noise Amplifier for Radio Frequency Applications
The evolution of wireless telecommunication systems is expanding in an unprecedented way and such developments have prompted many design challenges specifically for low cost and low power System-on-Chip (SoC). In order to fulfill these needs, the design challenges need to be seen from all levels...
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| Main Author: | |
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| Format: | Thesis |
| Language: | English English |
| Published: |
2008
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| Online Access: | http://psasir.upm.edu.my/id/eprint/5469/1/FK_2008_73a.pdf http://psasir.upm.edu.my/id/eprint/5469/ |
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| Summary: | The evolution of wireless telecommunication systems is expanding in an unprecedented
way and such developments have prompted many design challenges specifically for low
cost and low power System-on-Chip (SoC). In order to fulfill these needs, the design
challenges need to be seen from all levels of the wireless system design from
architecture, circuit and the process technology. The first stage of a receiver is the radio
frequency (RF) input with low noise amplifier (LNA) as the first building block. Hence,
it dominates the performance of the receiver system especially in noise and sensitivity.
An LNA which incorporates a variable gain stage is useful in the receiver system in
order to achieve continuous gain controllability which can be used to prevent saturation
in the receiver when the input signal becomes relatively large compared to the power
supply. Thus, circuit solutions of current mirror, gain control loop, capacitively coupled
scheme and parallel inter-stage resonance are proposed. On-chip inductors are needed in
a LNA to fulfill its requirements of noise and input matching. Therefore, spiral inductors
are designed, analyzed and implemented according to the specifications. The main key part of this thesis describes the designs of the variable gain LNA
(VGLNA) for low power consumption, continuous gain control and high selectivity over
a wide frequency band with the target applications of frequency band at 2.0, 2.4, 5.0, 5.7
and 8 GHz. The VGLNA utilizes current mirror which allows precise copying of the
current independent of temperature. With an adequate biased voltage applied,
continuous gain control of approximately 28 dB is achieved at low current without
degrading the noise performance of the VGLNA significantly, maintaining it below 2
dB. Second approach proposes the capacitively coupled LNA which ensures that the
minimum required voltage supply for this topology is only one threshold voltage and not
doubled the amount though it is a cascode transistors structure. Hence with these two
innovative approaches, the power dissipation of the LNA would be minimal. Continuous
gain control is achieved with the gain control loop and current mirror methods. By
introducing a simple gain control loop composed of a gain control transistor and a
capacitor, a wide continuous gain tuning range is achieved and with the current mirror,
the VGLNA has continuous controllability of the gain. A new circuit structure named
parallel inter-stage resonance LNA is proposed and it offers high selectivity of gain over
the 5 GHz frequency band while keeping the noise figure below 2 dB.
The simulation results meet the desired specifications and the measurement results of
transistors and inductors are shown to be comparable with the analytical results. Finally,
it can be concluded that the VGLNA designs have shown continuous controllable gain
and low noise with low power consumption, not forgetting high selectivity over a wide
frequency band. |
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