Design of a high speed and low latency crypto-processor ASIC
This paper presents the design of an ultra high speed crypto-processor for next generation IT security. It addresses the next generation IT security requirements: the resistance against all attacks and high speed with low latency. The proposed processor is capable of generating cryptographically sec...
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IEEE
2008
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Online Access: | http://psasir.upm.edu.my/id/eprint/37530/1/Design%20of%20a%20high%20speed%20and%20low%20latency%20crypto-processor%20ASIC.pdf http://psasir.upm.edu.my/id/eprint/37530/ |
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my.upm.eprints.375302020-08-10T02:23:45Z http://psasir.upm.edu.my/id/eprint/37530/ Design of a high speed and low latency crypto-processor ASIC Ali, Md. Liakot Roy, Niranjan Faisal, Fazle Elahi Mohd Ali, Mohd Alauddin Aris, Ishak This paper presents the design of an ultra high speed crypto-processor for next generation IT security. It addresses the next generation IT security requirements: the resistance against all attacks and high speed with low latency. The proposed processor is capable of generating cryptographically secured information at a rate of multi-ten Gbps. The performance of the processor is compared with that of other researchers which proves it's superiority over them. IEEE 2008 Conference or Workshop Item PeerReviewed text en http://psasir.upm.edu.my/id/eprint/37530/1/Design%20of%20a%20high%20speed%20and%20low%20latency%20crypto-processor%20ASIC.pdf Ali, Md. Liakot and Roy, Niranjan and Faisal, Fazle Elahi and Mohd Ali, Mohd Alauddin and Aris, Ishak (2008) Design of a high speed and low latency crypto-processor ASIC. In: 2008 IEEE International Conference on Semiconductor Electronics (ICSE 2008), 25-27 Nov. 2008, Johor Bahru, Malaysia. (pp. 96-98). 10.1109/SMELEC.2008.4770284 |
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This paper presents the design of an ultra high speed crypto-processor for next generation IT security. It addresses the next generation IT security requirements: the resistance against all attacks and high speed with low latency. The proposed processor is capable of generating cryptographically secured information at a rate of multi-ten Gbps. The performance of the processor is compared with that of other researchers which proves it's superiority over them. |
format |
Conference or Workshop Item |
author |
Ali, Md. Liakot Roy, Niranjan Faisal, Fazle Elahi Mohd Ali, Mohd Alauddin Aris, Ishak |
spellingShingle |
Ali, Md. Liakot Roy, Niranjan Faisal, Fazle Elahi Mohd Ali, Mohd Alauddin Aris, Ishak Design of a high speed and low latency crypto-processor ASIC |
author_facet |
Ali, Md. Liakot Roy, Niranjan Faisal, Fazle Elahi Mohd Ali, Mohd Alauddin Aris, Ishak |
author_sort |
Ali, Md. Liakot |
title |
Design of a high speed and low latency crypto-processor ASIC |
title_short |
Design of a high speed and low latency crypto-processor ASIC |
title_full |
Design of a high speed and low latency crypto-processor ASIC |
title_fullStr |
Design of a high speed and low latency crypto-processor ASIC |
title_full_unstemmed |
Design of a high speed and low latency crypto-processor ASIC |
title_sort |
design of a high speed and low latency crypto-processor asic |
publisher |
IEEE |
publishDate |
2008 |
url |
http://psasir.upm.edu.my/id/eprint/37530/1/Design%20of%20a%20high%20speed%20and%20low%20latency%20crypto-processor%20ASIC.pdf http://psasir.upm.edu.my/id/eprint/37530/ |
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