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Synchronization in coupled Ikeda delay system

In this work, we demonstrate the use of a Field Programmable Gate Array (FPGA) as a physical platform for realizing chaotic delay differential equations (DDE). Moreover, using our platform, we also experimentally study the synchronization between two time delayed systems. We illustrate two different...

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Main Authors:	Valli, D., Muthuswamy, Bharathwaj, Banerjee, Santo, Kamel Ariffin, Muhammad Rezal, Abdul Wahab, Ainuddin Wahid, Kaliyaperumal, Ganesan, Subramaniam, Chittur Krishnaswamy, Kurths, Juergen
Format:	Article
Published:	Springer 2014
Online Access:	http://psasir.upm.edu.my/id/eprint/35559/ http://link.springer.com/article/10.1140%2Fepjst%2Fe2014-02144-8
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id	my.upm.eprints.35559
record_format	eprints
spelling	my.upm.eprints.355592016-01-14T05:00:27Z http://psasir.upm.edu.my/id/eprint/35559/ Synchronization in coupled Ikeda delay system Valli, D. Muthuswamy, Bharathwaj Banerjee, Santo Kamel Ariffin, Muhammad Rezal Abdul Wahab, Ainuddin Wahid Kaliyaperumal, Ganesan Subramaniam, Chittur Krishnaswamy Kurths, Juergen In this work, we demonstrate the use of a Field Programmable Gate Array (FPGA) as a physical platform for realizing chaotic delay differential equations (DDE). Moreover, using our platform, we also experimentally study the synchronization between two time delayed systems. We illustrate two different experimental approaches – one is hardware co-simulation (using a Digilent Atlys with a Xilinx Spartan-6 FPGA) and the other is analog output (using a Terasic DE2-115 with an Altera Cyclone IV E FPGA). Springer 2014-06 Article PeerReviewed Valli, D. and Muthuswamy, Bharathwaj and Banerjee, Santo and Kamel Ariffin, Muhammad Rezal and Abdul Wahab, Ainuddin Wahid and Kaliyaperumal, Ganesan and Subramaniam, Chittur Krishnaswamy and Kurths, Juergen (2014) Synchronization in coupled Ikeda delay system. The European Physical Journal Special Topics, 223 (8). pp. 1465-1479. ISSN 1951-6355; ESSN: 1951-6401 http://link.springer.com/article/10.1140%2Fepjst%2Fe2014-02144-8 10.1140/epjst/e2014-02144-8
institution	Universiti Putra Malaysia
building	UPM Library
collection	Institutional Repository
continent	Asia
country	Malaysia
content_provider	Universiti Putra Malaysia
content_source	UPM Institutional Repository
url_provider	http://psasir.upm.edu.my/
description	In this work, we demonstrate the use of a Field Programmable Gate Array (FPGA) as a physical platform for realizing chaotic delay differential equations (DDE). Moreover, using our platform, we also experimentally study the synchronization between two time delayed systems. We illustrate two different experimental approaches – one is hardware co-simulation (using a Digilent Atlys with a Xilinx Spartan-6 FPGA) and the other is analog output (using a Terasic DE2-115 with an Altera Cyclone IV E FPGA).
format	Article
author	Valli, D. Muthuswamy, Bharathwaj Banerjee, Santo Kamel Ariffin, Muhammad Rezal Abdul Wahab, Ainuddin Wahid Kaliyaperumal, Ganesan Subramaniam, Chittur Krishnaswamy Kurths, Juergen
spellingShingle	Valli, D. Muthuswamy, Bharathwaj Banerjee, Santo Kamel Ariffin, Muhammad Rezal Abdul Wahab, Ainuddin Wahid Kaliyaperumal, Ganesan Subramaniam, Chittur Krishnaswamy Kurths, Juergen Synchronization in coupled Ikeda delay system
author_facet	Valli, D. Muthuswamy, Bharathwaj Banerjee, Santo Kamel Ariffin, Muhammad Rezal Abdul Wahab, Ainuddin Wahid Kaliyaperumal, Ganesan Subramaniam, Chittur Krishnaswamy Kurths, Juergen
author_sort	Valli, D.
title	Synchronization in coupled Ikeda delay system
title_short	Synchronization in coupled Ikeda delay system
title_full	Synchronization in coupled Ikeda delay system
title_fullStr	Synchronization in coupled Ikeda delay system
title_full_unstemmed	Synchronization in coupled Ikeda delay system
title_sort	synchronization in coupled ikeda delay system
publisher	Springer
publishDate	2014
url	http://psasir.upm.edu.my/id/eprint/35559/ http://link.springer.com/article/10.1140%2Fepjst%2Fe2014-02144-8
_version_	1643831489733853184
score	13.211869

Synchronization in coupled Ikeda delay system

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