Fault simulation using MPMSLFSR-based test pattern
This paper presents fault simulation results of ISCAS85 bench-mark circuits using test pattern employing multiple polynomial, multiple seed linear feedback shift register (MPMSLFSR). It has been shown that proper feedback connection and appropriate seed of LFSR produces better fault coverage using l...
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| Main Authors: | , , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
Universiti Putra Malaysia Press
2002
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| Online Access: | http://psasir.upm.edu.my/id/eprint/18384/1/18384.pdf http://psasir.upm.edu.my/id/eprint/18384/ |
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| Summary: | This paper presents fault simulation results of ISCAS85 bench-mark circuits using test pattern employing multiple polynomial, multiple seed linear feedback shift register (MPMSLFSR). It has been shown that proper feedback connection and appropriate seed of LFSR produces better fault coverage using lower number of test pattern. We have also compared and validated the results with that of other researchers. |
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