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Influence of Optimization of Process Parameters on Threshold Voltage for Development of HfO2/TiSi2 18 nm PMOS

Manufacturing a 18-nm transistor requires a variety of parameters, materials, temperatures, and methods. In this research, HfO2 was used as the gate dielectric ad TiO2 was used as the gate material. The transistor HfO2/TiSi2 18-nm PMOS was invented using SILVACO TCAD. Ion implantation was adopted in...

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Main Authors: Atan, N., Ahmad, I., Majlis, B.Y., Azle, M.F.
Format:
Language:English
Published: EDP Sciences 2017
Subjects:
Gate dielectrics
Hafnium oxides
Ion implantation
Ions
Manufacture
Taguchi methods
Threshold voltage
Compensation implantations
Fabrication process
Halo implantation
Ion implantation methods
Online Access:http://dspace.uniten.edu.my:8080/jspui/handle/123456789/5183
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spelling my.uniten.dspace-51832017-11-15T03:06:52Z Influence of Optimization of Process Parameters on Threshold Voltage for Development of HfO2/TiSi2 18 nm PMOS Atan, N. Ahmad, I. Majlis, B.Y. Azle, M.F. Gate dielectrics Hafnium oxides Ion implantation Ions Manufacture Taguchi methods Threshold voltage Compensation implantations Fabrication process Halo implantation Ion implantation methods Manufacturing a 18-nm transistor requires a variety of parameters, materials, temperatures, and methods. In this research, HfO2 was used as the gate dielectric ad TiO2 was used as the gate material. The transistor HfO2/TiSi2 18-nm PMOS was invented using SILVACO TCAD. Ion implantation was adopted in the fabrication process for the method's practicality and ability to be used to suppress short channel effects. The study involved ion implantation methods: compensation implantation, halo implantation energy, halo tilt, and source-drain implantation. Taguchi method is the best optimization process for a threshold voltage of HfO2/TiSi2 18-nm PMOS. In this case, the method adopted was Taguchi orthogonal array L9. The process parameters (ion implantations) and noise factors were evaluated by examining the Taguchi's signal-to-noise ratio (SNR) and nominal-the-best for the threshold voltage (VTH). After optimization, the result showed that the VTH value of the 18-nm PMOS device was-0.291339. © 2016 The Authors, published by EDP Sciences. 2017-11-15T02:56:23Z 2017-11-15T02:56:23Z 2016 http://dspace.uniten.edu.my:8080/jspui/handle/123456789/5183 10.1051/matecconf/20167801019 en MATEC Web of Conferences EDP Sciences
institution Universiti Tenaga Nasional
building UNITEN Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Tenaga Nasional
content_source UNITEN Institutional Repository
url_provider http://dspace.uniten.edu.my/
language English
topic Gate dielectrics
Hafnium oxides
Ion implantation
Ions
Manufacture
Taguchi methods
Threshold voltage
Compensation implantations
Fabrication process
Halo implantation
Ion implantation methods
spellingShingle Gate dielectrics
Hafnium oxides
Ion implantation
Ions
Manufacture
Taguchi methods
Threshold voltage
Compensation implantations
Fabrication process
Halo implantation
Ion implantation methods
Atan, N.
Ahmad, I.
Majlis, B.Y.
Azle, M.F.
Influence of Optimization of Process Parameters on Threshold Voltage for Development of HfO2/TiSi2 18 nm PMOS
description Manufacturing a 18-nm transistor requires a variety of parameters, materials, temperatures, and methods. In this research, HfO2 was used as the gate dielectric ad TiO2 was used as the gate material. The transistor HfO2/TiSi2 18-nm PMOS was invented using SILVACO TCAD. Ion implantation was adopted in the fabrication process for the method's practicality and ability to be used to suppress short channel effects. The study involved ion implantation methods: compensation implantation, halo implantation energy, halo tilt, and source-drain implantation. Taguchi method is the best optimization process for a threshold voltage of HfO2/TiSi2 18-nm PMOS. In this case, the method adopted was Taguchi orthogonal array L9. The process parameters (ion implantations) and noise factors were evaluated by examining the Taguchi's signal-to-noise ratio (SNR) and nominal-the-best for the threshold voltage (VTH). After optimization, the result showed that the VTH value of the 18-nm PMOS device was-0.291339. © 2016 The Authors, published by EDP Sciences.
format
author Atan, N.
Ahmad, I.
Majlis, B.Y.
Azle, M.F.
author_facet Atan, N.
Ahmad, I.
Majlis, B.Y.
Azle, M.F.
author_sort Atan, N.
title Influence of Optimization of Process Parameters on Threshold Voltage for Development of HfO2/TiSi2 18 nm PMOS
title_short Influence of Optimization of Process Parameters on Threshold Voltage for Development of HfO2/TiSi2 18 nm PMOS
title_full Influence of Optimization of Process Parameters on Threshold Voltage for Development of HfO2/TiSi2 18 nm PMOS
title_fullStr Influence of Optimization of Process Parameters on Threshold Voltage for Development of HfO2/TiSi2 18 nm PMOS
title_full_unstemmed Influence of Optimization of Process Parameters on Threshold Voltage for Development of HfO2/TiSi2 18 nm PMOS
title_sort influence of optimization of process parameters on threshold voltage for development of hfo2/tisi2 18 nm pmos
publisher EDP Sciences
publishDate 2017
url http://dspace.uniten.edu.my:8080/jspui/handle/123456789/5183
_version_ 1644493608384987136
score 13.222552

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