Optimisation of N-channel trench power MOSFET using 2 k factorial design method

The main objective of this research is to optimize the trench depth, trench width, epitaxial resistivity and epitaxial thickness in trench power MOSFET so as to obtain high breakdown voltage but low on-resistance. Optimisation of these parameters are based on 2 k factorial design method for achievin...

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主要な著者: Nur S.I., Ibrahim A., Hafizah H.
その他の著者: 56402634600
フォーマット: 論文
出版事項: 2023
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要約:The main objective of this research is to optimize the trench depth, trench width, epitaxial resistivity and epitaxial thickness in trench power MOSFET so as to obtain high breakdown voltage but low on-resistance. Optimisation of these parameters are based on 2 k factorial design method for achieving specific on-resistance 0.1 m?cm 2 and blocking voltage higher than 30 V. ATHENA and ATLAS software from Silvaco Int. were used for fabrication simulation and device electrical characterisation. The results obtained were, the optimisation value for trench width was 1.25?m, trench depth was 1.25 ?m, epitaxial thickness was 4.75 ?m and epitaxial resistivity was 032 ?cm. The predictive value of breakdown voltage was 39.41 V and significant to factors trench depth, epitaxial thickness and epitaxial resistivity. The predictive value for on-resistance was 0.105 m?cm 2 with significant to factors trench depth, epitaxial thickness and epitaxial resistivity. In conclusion, 2 k factorial design method is successfully utilised in optimizing n-channel trench power MOSFET.