所蔵: Implementation of low-cost reconfigurable external mixed-signal VLSI circuit testing system

Implementation of low-cost reconfigurable external mixed-signal VLSI circuit testing system

The optimisation of combined built-in self-test (BIST) and automatic test equipment (ATE) is desirable for complex fabricated chip testing to meet the high fault coverage while preserving acceptable costs. The fault coverage of BIST and ATE plays a significant role, because it can affect the area ov...

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主要な著者:	Islam S.Z., Ali M.A.M.
その他の著者:	55432804400
フォーマット:	論文
出版事項:	Institution of Engineers (Australia) 2023
主題:	Automatic testing Equipment testing Integrated circuit testing Integration testing Mixed signal integrated circuits Reconfigurable hardware Semiconductor device manufacture System-on-chip Timing circuits VLSI circuits Automatic test equipment Circuit testing Fabricated chips Fault coverages Hybrid techniques Reconfigurable Test pattern generations Very-large-scale integration circuits Built-in self test
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Implementation of low-cost reconfigurable external mixed-signal VLSI circuit testing system

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